bxCAN Identifier Filtering Technology and Application on SIM32F107VCT6 Platform

　　introduction

　　In the CAN protocol, the identifier of the message does not represent the address of the node, but is related to the content of the message. During the communication process, the sender attaches a specific identifier to the data and sends it to the bus in the form of broadcast. Due to the local area network nature of the CAN bus, other nodes on the bus will detect this message at the same time, and the receiving node will decide whether the software needs the message based on the value of the identifier. If necessary, it will be copied to the SRAM; if not, the message will be discarded without software intervention. This hardware filtering method can greatly save CPU overhead.

　　The widely used STM32F10x series embedded chips have built-in bxCAN controllers. This controller is a bus interface extended on the basis of the standard CAN bus, supporting CAN bus protocols 2.0A and 2.0B. Its design goal is to efficiently process a large number of received messages with minimal CPU load. It also supports the priority requirements for message sending (the priority characteristics can be configured by software). In order to meet the identifier hardware filtering requirements in the CAN bus protocol, the bxCAN controller provides a variable-width, configurable filter group to complete the function of receiving only the messages required by the software.

　　This paper mainly takes the bxCAN controller under the STM32F107VCT6 platform as the research object, systematically analyzes the use of identifier filtering of the controller, and gives a C language program to facilitate porting and use.

　　1 Introduction to registers related to identifier filtering

　　The bxCAN controller needs to be controlled by a set of corresponding registers to implement hardware filtering of identifiers. These registers mainly include CAN filter bit width register, CAN filter master register, CAN filter group register, etc. The above registers can control the filter bit width, filter mode and filter ID respectively. These registers are introduced below.

　　(1) CAN filter bit width register

　　The variable bit width of the bxCAN controller filter means that the bit width of each filter group can be configured independently to meet the different needs of the application. Depending on the bit width, each filter group can provide one 32-bit filter or two 16-bit filters. The register used to configure the filter group bit width is the FSCx bit of CAN_FS1R.

　　(2) CAN filter master control register

　　The bxCAN controller's filter has two configuration modes, namely mask bit mode and identifier list mode. In mask bit mode, the identifier register and the mask register together specify any bit of the message identifier, which is processed as "must match" or "don't care". In identifier list mode, the mask register is also used as an identifier register. Therefore, instead of using one identifier plus one mask bit, two identifier registers are used. Each bit of the received message identifier must be the same as the filter identifier. The FBMx bit of CAN_FMR can be used to configure the identifier list mode or mask bit mode of the corresponding mask/identifier register.

　　(3) Filter group register

　　The bxCAN controller under the STM32F107VCT6 platform provides 28 variable-width, configurable filter groups. Each filter group X consists of two 32-bit registers, CAN_FxR1 and CAN_FxR2. CAN_FxR1 and CAN_FxR2 can be configured into identifier filter groups with different bit widths and different filtering modes under the control of the CAN filter bit width register and the CAN filter master register.

　　2 Identifier Filter Parameter Configuration

　　The identifier filter parameter configuration is mainly to set the filter bit width through the FSCx bit of CAN_FS1R, set the filter mode through the FBMx bit of CAN_FMR, and finally implement the hardware filter setting of the identifier through CAN_FxR1 and CAN_FxR2 in the corresponding bit width and filter mode. Figure 1 is a parameter configuration diagram of the above registers cooperating with each other to implement the identifier hardware filtering.

　　As shown in Figure 1, when the FSCx bit of CAN_FSIR takes the value of 0, each identifier filter is 16 bits; otherwise, each identifier filter is 32 bits. When the number of identifier filter bits is constant, when the FBMx bit of CAN_FMR takes the value of 0, the filter mode of the identifier filter is the mask bit mode, otherwise, the filter mode of the identifier filter is the identifier list mode; it should be pointed out that in the identifier mask bit mode, the identifier register CAN_FxR1 writes the identifier ID information that needs to be filtered, which consists of 11-bit basic ID (STID), 18-bit extended ID (EXID), identifier extension bit (IDE), and send request bit (RTR) mapping; each bit in the mask register CAN_FxR2 corresponds to each bit in the CAN_FxR1 register, that is, if a bit in the CAN_FxR2 register takes the value of 0, the corresponding bit in the CAN_FxR1 register is treated as "don't care" during hardware filtering; otherwise, it is treated as "must match".

　　3 Identifier filtering rules

　　The identifier hardware filtering rules of bxCAN follow the following principles: When receiving a message, its identifier is first compared with the filter configured in the identifier list mode. If a match is found, the message is stored in the associated buffer FIFO, and the sequence number of the matched filter is stored in the filter match sequence number. If there is no match, the message identifier is then compared with the filter configured in the screen

　　The hardware compares the packet to the filters in masked mode. If the packet identifier does not match any identifier in the filter, the hardware discards the packet without any interruption to the software. [page]

    Figure 2 is an illustration of the bxCAN controller identifier filtering mechanism. Three filter groups are in identifier list mode, and the other filter groups are in identifier mask mode. The identifiers of the filter groups working in identifier list mode are 0, 1, 4, and 5, while the identifiers of the filter groups working in identifier mask mode are 2 and 3. Assuming that the identifier of a data message is 4, when the message arrives at the receiving node, it will first be compared with the identifier in list mode. Obviously, the message identifier matches the filter with identifier 4, so the message content is stored in FIFO, and the filter number is saved in the filter match sequence number field FMI. If the identifier of the data message does not match the identifier of the filter group in list mode, assuming the identifier is 3, the message identifier will be compared with the filter group in mask mode, and there is a filter with identifier 8 in this type of filter group, then the data message will also be sent to FIFO after matching, and the matching sequence number will be saved.

　　4 Identifier filtering programming implementation

　　In order to more clearly illustrate the application method of bxCAN controller identifier filtering, an experimental program is compiled in C language. The program is debugged, simulated and downloaded in real time through the JTAG interface under the MDK platform development environment, and has been verified in actual application.

　　The main code is as follows:

　　After the above code is set, the filter starts working, and the filter width is 32 bits, working in shielding mode. Only packets with basic ID 00000000000B are filtered, and packets with other identifiers are discarded by hardware.

　　Conclusion

　　This article mainly studies the identifier filtering technology of the bxCAN controller of the STFM32F107VCT6 chip. To use the identifier filtering function of the bxCAN controller, you need to first set the filter bit width through the FSCx bit of the bit width register CANFS1R, then set the filter mode through the FBMx bit of the master register CAN_FMR, and finally implement the hardware filtering setting of the identifier through the filter groups CAN_FxR1 and CAN_FxR2 in the corresponding bit width and filter mode.

　　Hardware filtering using identifiers can realize complex acceptance filtering functions, and hardware filtering does not occupy additional CPU resources. The above characteristics are very suitable for the data transceiver function of embedded systems. This article has a certain reference role in the data transceiver of the bxCAN controller using the STM32F107VCT6 chip in the embedded development process.