System Introduction

The main function of this system is to compress the voice signal to achieve high-efficiency digital recording, which can be used for telephone messages, voice answering and other occasions. Although the recording time is long when using tape recording to achieve telephone messages, it is not easy to find and save. Digital recording can overcome the shortcomings of tape recording. It is not only fast to find, but also very convenient to edit and organize the recording information. What is more convenient is that the digital recording information can be transferred to the computer hard disk or CD for long-term storage. However, the disadvantage of digital recording is that it requires a lot of storage space to achieve long-term recording. Therefore, this system uses a single-chip flash memory KM29N160 with a storage capacity of 16MB on the one hand, and uses a rate of 2.0Kb/s to compress the voice on the other hand. After using these two methods, more than 2 hours of digital recording can be achieved.

System hardware design

The whole hardware design consists of three parts: the first is the TMS320C5402 DSP processing system, including TMS320C5402, program memory, data memory, analog-to-digital conversion circuit, etc.; the second is the flash memory and its interface with TMS320 C5402; the third is the AT89C51 main processor, including the AT89C51 processor, keyboard display circuit and the interface between AT89C51 and TMS320C5402. Figure 1 is a schematic block diagram of the whole hardware system.

Hardware diagram of digital compressed voice recording and playback system

　　Figure 1 Hardware diagram of digital compressed voice recording and playback system

DSP processing system

The TMS320C5402 DSP processing system mainly completes the compression and decompression functions of voice. The system is mainly composed of TMS320C5402, EPROM 27C256-15 (1 piece), high-speed RAM CY7C199-10 (2 pieces), decoding circuit, crystal oscillator, analog-to-digital conversion circuit, etc. Among them, EPROM stores boot information and program code, and its address is 8000H~FFFFH in the data space. When the DSP chip is powered on, the program code in the EPROM is moved to the high-speed RAM. The access time of the high-speed RAM is 10ns, and it can be executed at full speed. The address is 0000H~7FFFH, a total of 32K words, and both programs and data can be accessed. The ADC uses the PCM codec MC14LC5480 from Motorola. This chip integrates voice A/D, D/A and anti-aliasing filtering, and uses a single 5V power supply. The TMS320C5402 provides a serial port that can interface with serial devices such as PCM encoders, so you only need to connect the corresponding pins one by one. The interface circuit is shown in Figure 2.

Interface circuit between dsp and ADC

Figure 2 DSP and ADC interface circuit [page]

Master-slave system design

The whole system consists of two processors, AT89C51 and TMS320C5402, connected in master-slave mode, where AT89C51 is the system host, completing the system's human-machine interface and controlling TMS320C5402. The single-chip microcomputer and DSP are connected through HPI-8. The standard HPI-8 port is an 8-bit parallel port that can be used to implement the interface between DSP and the host device or main processor. The two parties complete communication by sharing the on-chip memory of TMS320C5402. The single-chip microcomputer is the main control part and directly accesses the HPI port in port mode. The HPI port is mainly composed of the address register (HPIA), control register (HPIC), data register (HPID), HPI memory and HPI control logic. There are three steps to read and write data on the HPI port: setting the control register, writing the address register and reading and writing the data register. The HPI port hardware interface of the single-chip microcomputer and DSP is shown in Figure 3.

HPI port hardware interface connection method between single chip microcomputer and DSP

Figure 3 MCU and DSP HPI port hardware interface connection method

System software design

Software Design of TMS320C5402

The software of TMS320C5402 includes two parts: EPROM boot program and system software. Among them, the EPROM boot program is relatively simple, and its function is to move the system software from the low-speed EPROM to the high-speed RAM. The system software consists of three parts: the main program, the serial interrupt service program and the INT0 interrupt service program.

The main program completes the initialization of the system, including reading the number of voice segments and digital volume information stored in the flash memory. After completing the initialization process, the TMS320C5402 waits for various commands sent from the AT89C51 main processor and calls the corresponding processing program according to different commands.

The serial interrupt service routine completes the voice input/output and data format conversion functions. Since the data output by the PCM codec is 8-bit m-law data, it is necessary to convert the m-law data into linear format data for TMS320C5402 to process. Similarly, the linear data output by TMS320C5402 also needs to be converted into 8-bit m-law before it can be sent to the PCM codec for D/A conversion.

The INT0 interrupt service routine is mainly used to receive various commands sent from AT89C51 and set the corresponding command flags so that TMS320C5402 can recognize and call the corresponding subroutine in the main program.

Software Design of AT89C51

AT89C51 software mainly includes initialization program, main program, timer interrupt service program and INT0 interrupt service program. In the initialization program, the initialization of AT89C51, the reset of TMS320C5402, the number of voice segments and digital volume stored in the flash memory are obtained from TMS320C5402, etc. The main program is mainly a key processing program. The timer interrupt service program interrupts every 10ms, increases the values ​​of various counters required by the program, and sets various timing arrival flags for the main program to judge and use.

Conclusion

This article has given the hardware platform and software design ideas. As long as the hardware platform is made and the simulated program is transplanted to the DSP platform, digital compressed voice recording and playback can be realized. The trial has shown that the voice recording and playback effect is very good