Using DMA in STM32 to generate and capture square waves

1 Introduction to STM32 Microcontrollers
The STM32 series microcontrollers are highly integrated microcontrollers based on the Cortex-M3 core from ST. It sets a new benchmark in terms of performance, price, power consumption and real-time performance. It integrates the Cortex-M3 core, as well as a rich set of peripherals such as dual ADC, multi-purpose universal clock TIMx, RTC, I2C, SPI, UART, CAN, DMA, USB, etc. Its power consumption is only 36 mA when all modules are turned on at full speed 72MHz, and its power consumption is only 2μA in low-power mode.

2 Introduction to DMA and TIMx
The STM32 series microcontrollers all contain DMA and universal clock TIMx modules. Its low-end models only include DMA1, which supports 7 channels; high-end models also include DMA2, which supports 5 channels. Each of its channels can specify any working mode, such as memory to memory, memory to peripherals, or peripherals to memory. When it comes to peripherals, it is generally the peripherals that trigger a DMA transmission, such as the flag bit of the serial port receiving data can trigger DMA.
Each DMA transfer is divided into four stages: arbitration application, address calculation, bus access and response. Except for the bus access stage, the other three stages only require one system cycle and do not occupy the bus, and can be executed concurrently inside the DMA controller. In the bus access stage, the transfer of each word (4 bytes) requires three system cycles. DMA and CPU work in an alternating manner and will not block each other. Each DMA channel can set the priority independently. When accessing the same resource, the high-priority channel obtains the resource first.
The use of DMA is relatively simple. Each DMA channel only includes 4 registers to specify the DMA working mode, source address, destination address and number of transfers. ST provides a good driver library that simplifies the use of peripherals and is easy to read and transplant. This article uses library functions to demonstrate functions.
Its universal clock is a very distinctive peripheral module that can realize a variety of complex functions. The clock module mainly contains a counter and 4 channels of comparison/capture registers. The clock can work in capture or comparison mode. In the capture mode, if there is a corresponding trigger signal, the counter value will be saved to the compare/capture register and trigger an interrupt or DMA; in the compare mode, if the counter value is equal to the compare/capture register value, the pre-selected signal, such as high level, low level or level inversion, will be output externally.

3 Using DMA+TIMx to generate multiple square waves
The four compare/capture channels of the clock plus DMA can generate four square waves with different frequencies and duty cycles. To simplify the text, only the code for generating one square wave is listed here. The basic principle is: set the four channels of the clock to the inversion mode (that is, when the counter is equal to the compare/capture register, the corresponding CPU pin level is reversed), set the counter to count up to 0xFFFF; then pre-calculate the time when the pin needs to be reversed, and enable the DMA request of the corresponding channel. In this way, when the counter is equal to the compare/capture register value, the DMA will send the next time when the pin level needs to be reversed to the compare/capture register. Here,
DMA is set to half-word (2 bytes) circular transmission from memory to peripherals. Enable DMA full and half full interrupts, and continuously fill in new time values ​​in the interrupt processing function to ensure that the generated waveform is uninterrupted. Assuming that the length of the buffer storing the time value is N, the interrupt will be triggered every N/2 points, so that the CPU does not need to enter the interrupt frequently, and the execution efficiency is relatively high. It can also be seen from this that the larger the buffer, the lower the real-time requirements for the interrupt response, and of course the longer the interrupt processing time. The following is the sample code:


It should be noted that the preload function of the compare/capture register must be disabled. What we need is to compare the value written to the compare/capture register with the counter and output it immediately without waiting for an update event. [page]

4 Using DMA+TIMx to capture multiple square waves
Suppose there is a square wave that needs to be recorded and analyzed. One solution is to set the CPU pin to interrupt at the rising and falling edges, and then record the moment in the interrupt. The real-time and efficiency of this processing method will be worse, because the interrupt itself requires a certain instruction cycle (Cortex-M3 is 12+12 or 6+12 system cycles), and it is necessary to consider the worst case of multiple interrupts occurring at the same time, which has a certain limit on the maximum frequency of the detectable square wave. Another solution is to use polling to continuously query the status of the pin and record the rising and falling edges. In this way, the system can hardly handle other tasks.
Using DMA+TIMx to capture the rising and falling edges is conducive to improving the real-time and execution efficiency of the system. The level jump moment of the square wave is recorded in the comparison/capture register through the capture function of TIMx, and then DMA automatically transfers the value to the memory. Only when DMA triggers a half-full or full event does the CPU need to enter the interrupt to process the data. By recording the rising and falling edge times of the square wave and then subtracting the two times, we can get the width of all low and high edges, and finally perform subsequent analysis and processing. In this way, the interrupt frequency is only 4/N of the square wave frequency (N is the buffer size).
Figure 1 is a schematic diagram of a channel of TIMx working in capture mode.

Among them, TI1 is the input of the CPU pin. After filtering (the new level must be maintained for a certain period of time before it is considered valid to prevent interference from high-frequency noise), it enters the subsequent edge polarity selection and finally is divided as the input of the capture signal. Here, TI2F is the signal of the adjacent channel after filtering, that is, the signal of one pin can be used as the input capture signal of two channels of TIMx, so that the signal only needs to be connected to one CPU pin to trigger two clock channels.
Connect the input square wave to a pin of the CPU. Assume that the pin corresponds to TI1 in the figure, set it to trigger the capture event of channel 1 on the falling edge, and trigger the capture event of channel 2 on the rising edge. After the event occurs, apply DMA to save the value of the captured comparison/capture register. The sample code is as follows:

The other parts are basically the same as the code for comparing output in Section 3.

5 Summary
In the test, the STM32 series microcontroller works at 36 MHz, can generate a square wave with a maximum of 1.5 MHz, and can capture a square wave of 1 MHz, while the execution of the CPU is almost unaffected. Here, DMA is used to realize the generation and capture of square waves, which greatly improves the real-time performance and execution efficiency of the system, reduces the number of interrupts, and saves valuable resources. This solution can also be used to implement efficient analog serial ports.
DMA transmission requires multiple system cycles. For example, using DMA to realize memory-to-memory transfer requires 5 system cycles per transmission, and a memory-to-peripheral transmission requires 2 APB cycles + 5 AHB cycles. In this way, the minimum edge (low edge or high edge) of the square wave generated by the above method is 14 cycles (including the transmission from the compare/capture register to the internal shadow register, etc.). If there are higher requirements, other implementation solutions should be considered. In addition, if multiple DMAs are working at the same time, the worst-case DMA response time should be considered to avoid errors.