Serial port intelligent converter based on AT90S2343

Since RS-422 and RS-485 buses have the characteristics of strong anti-interference ability, high communication rate, long communication distance, and the ability to communicate with multiple slaves, they are widely used in master-slave multi-machine communication.

We have designed and developed an external serial port intelligent converter with AT90S2343 low-power single-chip microcomputer as the core, which converts RS232 serial port to RS-422 or RS-485 serial port. It does not require external power supply, and can automatically identify the communication baud rate (1200-115.2K) and communication mode (8-bit, 9-bit mode), intelligently control the connection between the receiving and sending circuits and the communication bus, and achieve plug-and-play without changing the existing software.

The converter has the characteristics of strong versatility, reliable performance, simple structure and easy use. It can be widely used in data acquisition, monitoring management and distributed control communication systems. In the insulation online monitoring system of electrical equipment, the author applies the converter to realize data communication of multiple data acquisition devices, and the communication performance is stable and reliable.

1. The overall structure of the circuit

The circuit diagram of the intelligent converter is shown in Figure 1. The entire circuit consists of four parts. The first part is the DC-DC power conversion circuit. It steals power from the signal line of the PC serial port and converts it into power for the intelligent converter; the second part is the RS-232 interface circuit, which realizes the conversion between the RS-232 level and the TTL level of each signal; the third part is the RS485/RS422 interface circuit, which realizes the conversion between the RS485/RS422 level and the TTL level of the communication bus; the fourth part is the intelligent control circuit with the CPU as the core, which monitors the TXD sending signal of the PC, identifies the communication baud rate, communication mode (10/11 bit mode), and intelligently controls the sending and receiving of communication data.

Figure 1 Serial port intelligent converter structure diagram

When the converter is used as RS485 half-duplex communication mode, the in-phase and inverting terminals of the transmitter output and receiver input must be short-circuited with two jumpers respectively.

2 Circuit Working Principle

2.1 DC-DC power conversion circuit

Since the RS232 interface does not provide power, the power supply of the entire circuit can only be obtained from the RS-232 signal line. The RS-232 interface has three output signals: DTR, RTS and TXD. Each signal can provide a typical output current of ±8mA. General software does not use the handshake signals RTS and DTR, and their output is -12V. The TXD signal is also output as -12V when it does not send data or sends data "1". In order to increase the output power of the power conversion circuit, the -12V output of the three signals DTR, RTS and TXD is used as the power input of the power conversion circuit in the circuit.

Since there is no DC-DC converter that converts negative voltage input to stable positive voltage output, the author has developed a DC-DC conversion circuit with an input voltage of -12V and a regulated output of +5V using the IC chip MAX761 based on the general DC-DC conversion circuit, with a conversion efficiency of >85%. The specific circuit is shown in Figure 2. In the circuit, MAX761 is a DC-DC conversion controller of PFM (pulse frequency modulation). The highest modulation frequency is 300KHZ. LX is the drain output terminal of the power drive tube (field effect tube); REF is the reference voltage output terminal; LB is the voltage sampling input terminal. The MAX761 controller and inductor L form a bootstrap boost circuit, and the output voltage sampling network consists of a voltage regulator tube W1, a transistor T, and resistors R1 and R2. The sampling voltage is input to the controller through LB, and the output voltage is stabilized by changing the frequency of the modulation pulse. The voltage regulation working principle of the circuit is as follows:

Figure 2 DC-DC power conversion principle diagram [page]

When the output voltage VOUT decreases, the base current IEB of the transistor T1 decreases, and the sampling voltage UR1 (βIEB×R1×) at the LB end decreases. When the sampling voltage (UR1) of LB is less than the internal reference voltage, the control signal controls the opening and closing of the power driver tube with the highest modulation frequency. When the power driver tube is turned on, LX is equal to -12V, the diode D4 is in the off state, and the current flows to LX through the inductor L. At this time, the inductor L stores energy. When the power driver tube is turned off, the inductor L releases energy, and the current generated by the back electromotive force charges the capacitor C4 through the diode D4, thereby increasing the output voltage VOUT.
When the output voltage VOUT increases, the base current IEB of the transistor T1 increases, and the sampling voltage UR1 (βIEB×R1×) at the LB end increases. When the sampling voltage (UR1) of LB is ≥ the internal reference voltage, the control signal controls the power driver tube to be in the off state within a complete modulation cycle, and the output voltage VOUT decreases due to load consumption.

Through the above pulse frequency modulation bootstrap boost regulation, the output voltage is stabilized at +5V.

The output voltage is determined by:

VOUT＝Vw1+Veb+Ib×R2≈Vw1+Veb ≈ 5V

2.2 Working Principle of Single Chip Microcomputer Intelligent Control

The RS485 communication mode is a half-duplex communication mode that uses the same pair of differential communication buses to control the time-sharing reception and transmission of data through the receiving and transmitting enable signals, and realizes two-way data communication. However, the RS232 communication interface cannot provide such an enable control signal. However, the single-chip microcomputer can monitor the host PC-TXD signal, accurately calculate the time to transmit a frame of data, and intelligently generate receiving and transmitting enable signals to control the time-sharing reception and transmission of data, thereby realizing half-duplex communication of data. The specific circuit of the serial port intelligent converter with the AT90S2343 low-power single-chip microcomputer as the core is shown in Figure 3.

The method for the microcontroller to identify the time to transmit a frame of data is as follows: When the microcontroller detects the start bit of the data sent by the host, it starts to measure the pulse width of each pulse of the PC-TXD signal and calculates the corresponding baud rate. If they all belong to the universal baud rate set, the highest baud rate among them is the communication baud rate. Otherwise, the pulse width is the interval time between sending two frames of data, and the moment of negative level transition is the beginning moment of the start bit, and the pulse width of each pulse is measured again. When the communication baud rate is determined, the level state of the tenth bit is detected. If it is a low level, it can be determined that it is an 11-bit communication mode. Otherwise, it is a 10-bit communication mode. The time to transmit a frame of data is calculated based on the communication baud rate and communication mode.

Figure 3 Schematic diagram of the serial port intelligent converter

The intelligent control process of receiving and sending data by the communication interface is as follows: Whenever the start bit of the data sent by the host is detected, the single-chip microcomputer outputs the receiving and sending enable signal (RE=1, DE=1), controls the receiving and sending circuits to prohibit receiving and allow sending data, and the host data is sent to the RS485 communication bus, and the timer starts timing. When the timing time is equal to the time to send a frame of data, the single-chip microcomputer outputs the receiving and sending enable signal (RE=0, DE=0), controls the receiving and sending circuits to allow receiving and prohibit sending data. At this time, the host can receive the slave data on the RS485 communication bus. When the single-chip microcomputer detects the start bit of the data sent by the host again, the above sending process is repeated.

During the communication process, baud rate measurement and intelligent control of sending and receiving data must be performed synchronously, otherwise communication data will be lost.

In order to meet the requirements of high-speed communication, the circuit uses the AT90SL2343 single-chip microcomputer from Atmel, USA. It is one of the latest single-chip microcomputer series, and its outstanding features are high execution speed and rich hardware resources on the chip. The use of CPU internal power monitoring and programmable watchdog timer makes the circuit have strong anti-interference ability. [page]

Allocation and function of the microcontroller I/O port: PB3 input, monitors the host PC-TXD signal; PB0 output, receives the enable signal; PB4 output, sends the enable signal; PB2 input, K1 sets the duplex or half-duplex communication mode.

3 Software Design

3.1 Program flow chart

The program flow chart of the serial port intelligent expansion card is shown in Figure 4.

3.2 Software Design for Half-Duplex Communication

In the RS485 half-duplex communication mode, data reception is first allowed and data transmission is prohibited. After the data start bit of the PC-TXD signal is detected, the communication interface prohibits receiving and allows data transmission, and starts timing. By detecting the width of each pulse of the data signal, its baud rate and the number of data transmission bits are determined, and then the time allowed for each frame of data to be sent is calculated. When the timing time is greater than or equal to this time, the communication interface prohibits sending and allows receiving data. In the receiving state, the CPU repeatedly detects the start bit of the transmitted data. When the start bit of the transmitted data is detected, the above data transmission control process is repeated.

3.3 Duplex Communication Software Design

In RS422 duplex communication mode, the receive and send enable signals are always valid, allowing data to be received and sent at the same time.

Figure 4 Program flow chart

4 Conclusion

The circuit structure is simple and does not require external power supply. The author makes it into a serial port converter and directly plugs it into the serial port socket. It has the characteristics of strong versatility, reliable performance, simple structure and easy use. The circuit uses power supply monitoring and programmable watchdog monitoring timer to make the converter have strong anti-interference ability. The converter can be widely used in master-slave multi-machine communication systems.

References

1. Wu Xiuqing et al., Microcomputer Principles and Interface Technology, University of Science and Technology of China Press, 1999.02

2. Li Xun, Geng Degen, AVR MCU Application Technology, Beijing University of Aeronautics and Astronautics Press, 2002.6