Design and implementation of VOIP based on CS4281 sound card in VxWorks

The basic principle of VOIP is to compress the sound data encoding through the sound compression algorithm, and then pack the sound data, send the data packets to the receiving place through the IP network, and then reassemble the sound data packets, and restore them to the original sound signals after decompression, so as to achieve the purpose of transmitting sound through the Internet. VxWorks is a commonly used embedded operating system, and embedded development applications based on VxWorks are very extensive. This article attempts to implement VOIP based on sound cards under the VxWorks operating system in a small-scale Ethernet environment, and provide support for some embedded development that requires sound cards.

1 Introduction to VxWorks and Sound Cards

VxWorks is a micro-kernel, high-performance, scalable real-time operating system designed and developed by Wind River System Inc. for real-time embedded systems. It provides programmers with efficient real-time task height, interrupt management, real-time system resources and real-time inter-task communication, and can be combined according to user needs. Application programmers can focus as much as possible on the application itself, without having to worry about the management of system resources. VxWorks is a powerful and complex operating system. It only takes up a small storage space and can be highly tailored to ensure that the system can run at a high efficiency. The excellent features of VxWorks provide great convenience for writing applications and device drivers. Under VxWorks, device drivers can be embedded in the kernel and start with the system, or they can be run as loadable modules after the system starts. The sound card driver in this article adopts the latter method.

The sound card selected in this article is CS4281/AC'97 from Cirrus Logic. This is a powerful sound card, which mainly consists of CS4281 and C2S4297A chips. CS4297A is a mixed signal serial codec that complies with the AC'97 (Audio Codec'97) specification. It is responsible for the sampling and mixing of the original sound signal, converting the received analog sound signal into a digital signal; it also converts the received digital audio signal into an analog signal through a special audio algorithm. CS4281 is a PCI-Ac'97 digital controller that provides an interface between a serial AC'97 codec (such as CS4297A) and a parallel PCI bus.

2 Overall Design

The program is divided into two modules: (1) VxWorks PCI driver for the CS4281 sound card, which implements sound recording and playback; (2) Communication module, which is responsible for receiving sound data from the driver module and packaging it for transmission via Ethernet; receiving Ethernet data, unpacking it into sound data and transmitting it to the driver module.

The lower layer is the sound card driver: the sound coming from the microphone is recorded here, and the PCM sampled sound data is sent to the upper layer; at the same time, the sound data is transmitted from the upper layer and sent to the sound card for playback and output through the headphones. The main functions are as follows: allocation of PCI configuration space to complete the search and memory mapping of the sound card; initialization of CS428l and CS4297 to perform a series of hardware initializations; allocation of DMA buffer to cache sound data between the sound card driver and the communication module; setting of sampling rate and format to select the appropriate sampling rate and format; opening and closing of the sound system to control the switch of recording and playback functions; interrupt processing function to access data between the sound card driver and the communication module through interrupts.

The upper layer is the communication part: the sound data is packaged into groups here and sent out through the network card. The data received from the network card is unpacked here and handed over to the sound card driver. The sending and receiving of data through Ethernet is realized by calling Socket.

2.1 Determine the sampling rate

Combined with the actual experimental environment, from a variety of sampling rates and formats, select 11025 Hz sampling frequency and 8 b mono. Calculate the lowest data transmission rate.

2.2 Set the buffer

If the traffic in the network changes greatly, delay jitter will occur. Two buffers need to be set up for caching when sending and receiving data to reduce the impact of delay jitter and ensure communication quality. The buffer size should be appropriate. If it is too small, data loss will occur; if it is too large, the jitter delay will increase.

In the x86 architecture, the page size is 4 kB. This is a limitation on the DMA buffer size, because DMA needs to be located in a memory page to maintain the continuity of the buffer and to adapt to UDP-based Socket communication. We determine that the size of the playback DMA buffer and the recording DMA buffer are both 2 kB, and use the "ping-pong" technology to transfer between the two buffers, then every 1 kB, there will be a playback interruption and a recording interruption. The number of interrupts in 1 s is: 1×11k/1k△11.

3 Sound Card Driver

3.1 PCI Local Bus

The sound card selected in this article is Cirrus Logic's CS4281/AC'97 PCI sound card. As a PCI device, it follows the same steps as general PCI devices during the initialization phase. [page]

Each PCI bus device has a configuration register space, which makes the configuration of the target device simple and easy. The configuration space is an address space with a capacity of 256 B and a specific structure. The configuration register is an information exchange area between the hardware of the PCI device and the initialization software and error handling software of the PCI device, so that the software can identify and control the PCI device and the PCI device can reflect the device status and requirements to the software. The space is divided into two parts: the header area and the device association area. The configuration space of a device can be accessed not only when the system is booted, but also at other times.

3.2 Sound card driver structure and process

(1) Sound card detection and entry

VxWorks BSP detects and initializes PCI devices in the system in syslib.c, detects the device's I/O mapping address, memory mapping address, interrupt vector and level. These hardware parameters play a vital role in the reading, writing and hanging interrupts of the main chip. Therefore, a sound card detection module is added here. Then the detected parameters are passed to the driver entry function.

In the sound card detection module, the manufacturer identification and device identification of CS4281/AC'97 are used to obtain its function number, bus number and device number. Then configure its PCI configuration space and map the sound card registers. Finally, the sound card memory mapping base address and interrupt vector and level are obtained.

(2) Entry function

The entry function mainly completes the initialization of the CS4281 control chip and CS4297 codec chip, DMA buffer memory allocation, setting the sampling rate and format, hanging interrupts and other tasks.

The initialization of the CS4281 chip should be carried out strictly in the order described in the literature [4]. The initialization of the CS4297 codec chip mainly completes the tasks of selecting and opening the headphone and microphone, and setting the volume. The registers involved are PCM_OUT_VOLUME, MASTER_VOLUME, HEAD-PHONE_VOLUME, GENERAL_PURPOSF, MICRO-PHONE_VOLUME, INPUT_MUX_SELECT, RE-CORD_GAIN, GENERAL_PURPOSE. Allocate a continuous 2 kB memory space for the DMA playback and recording buffers, and write the allocated memory space base address into the DMA base address register. In this article, we choose the 8-bit mono format and 11,025 Hz sampling frequency. After calculation, write the corresponding value into the DMA engine mode register and write the sampling rate into DACSR and ADCSR. Finally, use the interrupt vector and interrupt level obtained in the detection module to hook up the interrupt number and interrupt processing function.

(3) Start and close the sound system

This module mainly completes the start and stop of recording and the start and stop of playback. To start recording, write 0 to the MSK bit in DMA engine control register 1 and enable interrupts; to stop recording, write 1 to the MSK bit in DMA engine control register 1. To start playing, write 0 to the MSK bit in DMA engine control register 0 and enable interrupts; to stop playing, write 1 to the MSK bit in DMA engine control register 0.

(4) Interrupt handler

CS4281 has an interrupt status register and an interrupt mask register, and their corresponding bits have the same meaning. The interrupt status register reflects the types of interrupts that the sound card can generate. Once an interrupt occurs, analyze the interrupt status register, determine the interrupt type, and then perform corresponding processing. According to our design, if it is a playback interrupt, the playback semaphore is released to prompt the upper-level software to copy the sound data to the lower-level software; if it is a recording interrupt, the recording semaphore is released to prompt the upper-level software to take the sound data that has arrived from the lower-level software. Finally, the interrupt end flag is set.

(5) Data flow during playback and transmission Data

flow during playback. Data transfer between the play buffer (DMA buffer set above) and FIFO0 (sound data received from the formatter, stored in first-in-first-out mode, and played by the CS4297 chip) in the sound card is controlled by DMA0. The DMA0 engine tries to keep FIFO0 full. The play buffer is a 2 kB memory, and its starting address is written to the DMA0 base address register (DBA0). 2 047 B (the count should be 1 less than the number of bytes allocated, because the interrupt occurs in roll-unders mode) is written to the DMA0 base count register (DBC0), and the DMA0 engine controls the number of bytes read from the play buffer. When the play buffer is half empty or empty, an interrupt will be generated to prompt the upper layer software to fetch data.

Data flow during recording. Data transfer between the record buffer and FIFO1 (sound data received from the CS4297 chip, stored in first-in-first-out mode, and passed to the formatter) in the sound card is controlled by DMA1. The DMA1 engine tries to keep FIFO1 empty, and it also counts the number of bytes written to the record buffer. When the recording buffer is half full or full, an interrupt will be generated, prompting the upper-layer software to take the data away.

4 UDP Communication

4.1 UDP Protocol

Based on the Ethernet facility, VxWorks uses the end-to-end transmission capability provided by the Internet component TCP/IP to transmit user data between tasks located on different hosts. In VxWorks, Socket is used as the interface between the application and the TCP/IP protocol. There are two basic types of Socket: reliable data stream SOCK_STREAM, using the TCP protocol; datagram SOCK_DGRAM, using the UDP protocol.

UDP has the following advantages over TCP [2]:

(1) UDP messages are short, which helps to reduce transmission delay;
(2) UDP is a connectionless protocol. It does not need to establish a connection before sending data. It is suitable for applications with high real-time requirements such as voice data;
(3) UDP has no congestion control, so network congestion will not reduce the sending rate of the source host.

These advantages of UDP are very important for the real-time transmission of voice data. These advantages will ensure that the transmission has a short delay and a constant speed as much as possible, so UDP is selected.

In a connectionless Socket, the client and server are created at both ends of the communication. The two parties are equal in the whole process. Both parties send or receive datagrams directly through Socket calls.

UdpClient module: create client Socket; initialize server address; FOREVER{call UDP send module; send data to server}.

UdpServer module: create local address; create server Socket; bind Socket and local address; FOREVER{receive data; call UDP receive module).

4.2 UDP send

The send module waits for the recording semaphore. If obtained, it means that some new data is valid in the recording buffer. The new data will be copied from the recording buffer to the upper software storage area, and then sent to the other end host through Socket. If the storage area in the upper software is full, the old packet will be discarded and stored in the new packet. 4.3 UDP receive The

receive

module waits for data from the Socket. If the play semaphore is obtained, it means that the data in the play buffer has been played, and the data in the upper software storage area will be copied into the play buffer; otherwise, the task will be suspended. If the storage area in the upper software is full, the old packet will be discarded and stored in the new packet.

5 Main problems encountered

In the environment built in this article, the communication between the two sound cards can be well realized. During the development process, two main problems were encountered:

(1) There is no sound data in the sound card. There is no data in the FIFO buffer and DMA buffer of the sound card. After analysis, it was found that the registers for the headphone and microphone in the CS4297 chip were not opened and selected, and the headphone and microphone were always in the "mute" state. After turning off "mute", the problem was solved.

(2) An interrupt cannot be generated. There is already data in the DMA buffer. According to the program design, an interrupt should be generated at this time, and the upper-level communication module will take away the sound data, but the interrupt cannot be generated. After analysis, the reason is: the interrupt level obtained in the sound card detection program segment is directly used as the relay number to hang the interrupt. Solution: Get the interrupt vector through the interrupt level, and then get the interrupt number to hang the interrupt handler.