Software Anti-interference Technology in Single-Chip Microcomputer System

In recent years, the application of single-chip microcomputer systems in the field of industrial measurement and control has become more and more extensive. For industrial sites with harsh environments, the reliability and safety of this new type of microcontroller has become a big problem. Programs that run normally in the laboratory cannot run in the industrial site, or they run unstably and often crash. Here we mainly discuss how to enhance the stable operation of the system through software technology. When the CPU
part of the system is affected by interference signals, the system will be out of control. The most typical fault is to destroy the state value of the program counter PC . It causes the program to " fly around " in the address space or fall into an infinite loop. There are several main ways to deal with this situation: 1. Instruction redundancy technology; 2. Software trap technology; 3. Watchdog technology. The following is an illustration of the MCS-51 single-chip microcomputer. Instruction redundancy technology Instructions consist of opcodes and operands. The opcode indicates what kind of operation the CPU is going to complete, and the operand is the object of the opcode. Single-byte instructions only have opcodes and implicit operands; double-byte instructions, the first byte is the opcode, the second byte is the operand; three-byte instructions, the first byte is the opcode, and the last two bytes are the operands. When the CPU fetches instructions, it first fetches the opcode and then the operand. How to determine whether it is an opcode or an operand is to look at the order of fetching instructions. The order of fetching instructions is completely controlled by the instruction counter PC . Therefore, once the PC is disturbed and an error occurs, the program will deviate from the normal track and " fly around " , which will result in the situation where the operand is taken as the opcode, or the opcode is taken as the operand. However, as long as the PC pointer falls on a single-byte instruction, the program can be put on the right track. Therefore, in order to quickly put the program on the right track, more single-byte instructions should be used, and some single-byte instructions NOP should be inserted artificially in key places , or valid single-byte instructions should be rewritten. This is called instruction redundancy. The commonly used method is to insert two single-byte instructions NOP after some double-byte and three-byte instructions, or insert two NOP instructions before some instructions that play a decisive role in the flow of the program . Some important instructions can also be placed repeatedly. However, the condition for using instruction redundancy technology to put the program on the right track is that the flying PC must point to the program running area. Software trap technology When the flying program enters the non-program area, you can set a software trap to intercept the flying program and lead the program to a fixed position. In this way, the captured program can be put back on track. The software trap mainly reintroduces the program to its reset entry, that is, set such instructions in the appropriate place: NOP NOP LJMP 0000H Software traps are mainly arranged in such areas: unused interrupt area, unused EPROM space and non- EPROM space, program running area and interrupt service program area. Mainly look at the first three: 1. Unused interrupt area If the unused interrupt is opened due to interference, the interrupt service program can be written like this: NOP NOP POP D1 ; pop up the original error breakpoint POP D2 ; pop up the original error breakpoint PUSH 00H PUSH 00H ; rewrite the breakpoint address to 0000H RETI 2. Unused EPROM area Suppose a 2764 is used , but the entire storage area is not used up. At this time, you can fill the unused area with 020000 data, so that when the program flies into it, it will quickly get on track. This instruction is actually the machine code of "LJMP 0000H" . 3. Non- EPROM space The program space of the microcontroller system is 64K . Under normal circumstances, the EPROM used will not occupy all the space. Assuming that the current EPROM occupies 16K space, the remaining 48K space will be idle. When the flying PC falls into these spaces, the data read in will be FFH



























, this is: MOV R7 , the machine code of A instruction, will modify the content of R7 . Therefore, when the program flies into the non- EPROM chip area, it can not only fail to import into the normal state, but also destroy the content of R7 .
When the CPU reads the program memory, it will generate a PSEN signal. This signal, plus an address decoding signal of the non- EPROM area, can be used to form a selection signal to start an idle interrupt, and then use the software trap method to import the program into the normal state from the interrupt program.
It is also possible to use a buffer to directly write a value to the data line through hardware methods, and the principle is the same as the above method.
Software watchdog technology
The role of the watchdog is to prevent the program from an infinite loop, or the program from running away. The hardware watchdog uses a timer to monitor the operation of the main program. That is to say, during the operation of the main program, the timer must be reset before the timing time is up. If an infinite loop occurs, or the PC pointer cannot return. Then the microcontroller will be reset after the timing time is up.
The principle of software watchdog technology is similar to this, but it is implemented by software. Let's take the 51 series as an example. There are two timers in the 51 microcontroller. These two timers can be used to monitor the operation of the main program. Set a certain timing time for T0 . When a timing interrupt occurs, assign a value to a variable. This variable has an initial value at the beginning of the main program. The timing value to be set must be less than the running time of the main program. In this way, the value of the variable is judged at the end of the main program. If the value changes as expected, it means that the T0 interrupt is normal. If there is no change, the program is reset.
T1 is used to monitor the operation of the main program. Set a certain timing time for T1 and reset it in the main program. If it cannot be reset within a certain time, the timing interrupt of T1 will reset the microcontroller. Here, the timing time of T1 should be set to be greater than the running time of the main program, leaving a certain margin for the main program. Whether the interrupt of T1 is normal or not is monitored by the T0 timing interrupt subroutine. This forms a loop, T0 monitors T1 , T1 monitors the main program, and the main program monitors T0 , thus ensuring the stable operation of the system.