μPD780208 microcontroller functions and applications (

1 Overview

The μPD780208 series 8-bit microcontroller produced by Japan's NEC Corporation belongs to the 78K/0 family. This series is the most powerful among all the series of NEC's internally integrated FIP display drivers. According to the different internal integrated ROM and RAM capacities, the μPD780208 series can be divided into 5 models. This article mainly introduces the functions and applications of the highest model μPD780208 chip. The chip is a 100-pin QFP package, which integrates an 8-bit 78K0 CPU core, with 60kB of ROM, 2192B of RAM, 10 I/O ports with a total of 74 I/O lines, 1 FIP display driver/controller, 8-bit A/D converter, 2 serial I/O ports, 5 timers/counters, 3 timer outputs, 1 programmable clock output, 1 programmable buzzer output, 4 external interrupt sources, 12 internal interrupt sources and 1 test input terminal, and supports dual clocks. Its power supply voltage range is 2.7~5.5V, and 2 standby modes can be set. ΜPD780208 has the advantages of powerful functions, high reliability, fast speed and support for power-saving applications.

Figure 1 shows the functional block diagram of the μPD780208 chip.

2 Functional Features

2.1 CPU Structure

The memory addressing space of μPD780208 is 64kB, of which the program memory occupies the lower 60kB space and the upper end is the RAM area. RAM can be divided into the following 4 parts:

(1) Internal high-speed RAM area: 1024 bytes;

(2) Internal expansion RAM area: 1024 bytes;

(3) Buffer RAM area: 64 bytes;

(4) FIP display RAM area: 80 bytes.

Figure 2 shows the memory space usage of μPD780208. The special function register area (SFR) of the CPU in μPD780208 includes the chip hardware port I/O, control and status registers. [page]

2.2 Clock generator

μPD780208 can use two system clock oscillators to generate clocks: one is the main system clock oscillator, which supports crystal frequencies of 1 to 5.0MHz; the other is the subsystem clock oscillator, which operates at a frequency of 32768Hz. One of them can be programmably selected for CPU clock, timer clock or clock output. When the main system clock is used as the CPU clock, it can be selected to be undivided or divided by 2/4/8/16; while the subsystem clock can only provide 2 divisions as the CPU clock, so there are six options for the instruction cycle.

2.3 Timer

The timers in μPD780208 include TM0~TM3, WDTM, etc. It also has circuits such as clock output control and buzzer output control. Among them, the 16-bit timer/counter (TM0) can be used as an interval timer, PWM output, pulse width measurement, external event counter or square wave generator. The two 8-bit timers/counters (TM1 and TM2) can be used as interval timers, external event timers and square wave generators. The two 8-bit timers/counters can also be combined as a 16-bit timer/counter. This WATCH timer (TM3) is used to set the flag bit every 0.5 seconds and generate an interrupt at a preset time interval. The watchdog timer (WDTM) is used to perform the watchdog timing function, or to perform non-maskable interrupts, maskable interrupts and system reset (RESET) functions at a preset time interval.

The function of the clock output control circuit is to divide the main/subsystem clock and provide it to other devices for carrier output in remote control transmission.

The buzzer output control circuit mainly divides the main/subsystem clock and outputs it to obtain a buzzer output of a specified frequency.

2.4 A/D Converter

The A/D converter of μPD780208 is a successive approximation type with 8-bit resolution and 8 channels. The A/D conversion can be started by hardware trigger or software setting. The channel number, number of channels and conversion time of A/D conversion can be set by software programming.

2.5 Serial I/O Port

μPD780208 has two serial I/O ports, namely channel 0 and channel 1, which can provide the following three synchronous working modes.

(1) Line serial I/O mode

The three connections in this mode are serial clock (SCK0/1), serial output (SO0/1) and serial input (SI0/1). Synchronous transmission and synchronous reception can be performed simultaneously under the action of the synchronous clock.

(2) Serial bus interface (SBI) mode

The two wires in this mode are the serial clock (SCK0) and the serial data bus (SB0 or ​​SB1), which are mainly used for serial communication between multiple devices.

(3) 2-wire serial I/O mode

The two lines in this mode are the serial clock (SCK0) and serial data I/O (SB0 or ​​SB1), which are mainly used for half-duplex 8-bit data transmission and reception.

The functions of serial channels 0 and 1 are listed in Table 1.

Table 1 Functions of serial channels 0 and 1

2.6 FIP Display Control/Driver

FIP (Fluorescent Indicator Panel) display control/driver is a unique function of the μPD780208 series chip. Its main functions are as follows:

●Can automatically read display data and output segment and bit signals to realize the automatic display refresh function of hardware.

●By setting the mode registers DSPM0, DSPM1 and DSPM2, the display can be controlled to have 9 to 40 segments and 2 to 16 bits of FIP.

●By setting DSPM0 to select display mode 2, the bit signal output timing can be freely set.

●Except FIP0~FIP12 which are dedicated display output pins, other unused display pins can be used as ordinary I/O ports.

●The display brightness is divided into 8 levels and can be adjusted through DSPM1.

●The display timing includes the keyboard scan timing and can output the keyboard scan signal.

●With high driving capability, it can directly drive FIP display.

●Mask chip can provide pull-up resistor selection for display output pins. [page]

In other single-chip microcomputer systems, the display is often refreshed bit by bit by software timer interrupts. If a keyboard is used, the timer interrupt is also responsible for refreshing the keyboard, which consumes a lot of CPU resources. The FIP display control/driver of μPD780208 can realize the hardware automatic display refresh function. After the initial setup is completed, the software's job is only to put the display data into the FIP display RAM area according to the required mode, and provide a keyboard scanning function in the display timing, which greatly reduces the CPU resource usage.

2.7 Interrupt System

The interrupt system consists of interrupt sources and interrupt control parts, and has a test input function.

a. Interrupt source

The interrupt system of μPD780208 provides 3 interrupt types, 15 interrupt sources and 2 interrupt priorities. The 3 interrupt types are different mask interrupts, maskable interrupts and software interrupts. The interrupt source uses vector interrupt mode. The starting operation address (reset vector) after the system reset and the interrupt handler address (interrupt vector) of 15 interrupt sources can be stored in the lower 64 bytes of the memory, see Figure 2. See Table 2 for a detailed list of interrupt sources.

Table 2 Interrupt source table

b. Interrupt control

The interrupt function is controlled by the following 6 registers:

(1) Interrupt request flag registers IF0L and IF0H: When an interrupt request occurs, the corresponding bit is set to 1.

(2) Interrupt mask flag registers MK0L and MK0H: used to turn on or off specified maskable interrupt responses.

(3) Priority flag registers PR0L and PR0H: used to set the priority order of maskable interrupts, which are divided into high and low priorities.

(4) External interrupt mode register INTM0: used to specify the triggering effective edge of external interrupts INTP0, INTP1, and INTP2. The effective edge can be the falling edge, the rising edge, or both the rising and falling edges. INTP3 is fixed to the falling edge trigger.

(5) Sampling clock selection register SCS: used to set the sampling clock of INTP0.

(6) Program status word PSW: The IE and ISP flags are used to turn on or off the response to maskable interrupts and indicate the priority of the current interrupt.

c. Test input function

The test input function is also part of the interrupt system. There is no interrupt processing for the test input. It is triggered by the overflow of the WATCH timer and sets the test input flag WTIF.

2.8 Standby function

The standby function is used to reduce the functionality of the system. The μPD780208 supports two standby modes: suspend and stop.

Executing the HALT instruction will cause the system to enter the suspend mode from the normal operation mode. In this mode, the CPU operation clock is stopped, but the system clock oscillator is still working, so the power consumption is reduced but not much. When an interrupt request occurs, the suspend mode will be cleared, the system will immediately switch back to the normal operation mode, and execute the interrupt program.

Executing the STOP instruction will cause the system to enter the stop mode from the normal operation mode. In this mode, the system clock oscillator is requested to return the system to the normal operation mode, but since it takes some time for the system clock oscillator to start and reach stable operation, operations cannot be performed immediately when returning from this mode.

The suspend mode can work under the main system and subsystem clocks, while the stop mode can only work under the main system clock. In these two modes, all states of the CPU before entering the standby mode, including the I/O port states, are retained.

When the standby mode is cleared, the pause mode can be cleared by unmasked maskable interrupt request, unmasked interrupt request, unmasked test input, system RESET reset and other signals. After the pause mode is cleared by the first three methods, the CPU will continue to execute the next instruction of the HALT instruction; and after the system is reset, the CPU will enter the reset vector address.

Stop mode can be cleared by a non-maskable interrupt request, an unmasked test input, or a system RESET signal. After clearing, the CPU operates the same as in the suspend mode.

3 Applications

In summary, μPD780208 is a powerful stand-alone product, suitable for application systems that require fast speed, high reliability, strong expansion function and power saving. Figure 3 is an application example of μPD780208, which fully utilizes the performance characteristics of the chip. It includes VFD direct drive vacuum fluorescent tube display VFD, switch input and output, A/D conversion, keyboard scan input, serial communication, interface expansion and other modules. It is a relatively complete application system.