Research on the synchronization of data flow in SPI communication of single chip microcomputer

SPI is the abbreviation of Serial Peripheral Intcrface, usually called "synchronous peripheral interface", which is a full-duplex synchronous serial bus developed by Motorola. This bus is widely used in the communication between microprocessors and their peripheral devices. The software design related to SPI is relatively simple, giving the CPU more time to handle other matters. Now, more and more microcontrollers are equipped with SPI, and the number of peripheral chips using SPI is also increasing day by day. Using SPI communication can simplify circuit design, improve circuit reliability and reduce system cost.

1 Basic mode of SPI communication

The SPI communication bus defines the following 4 interface signals.

◇SIMO: slave in/master out.

◇SOMI: slave out/master in.

◇SCK: serial clock.

◇SS: slave select (defined as STE signal in some chips).

SPI communication has two modes: three-wire SPI and four-wire SPI. In the three-wire SPI mode, the slave selection signal SS/STE does not work; in the four-wire SPI mode, when the SS/STE signal is high, the slave is prohibited from receiving and sending data, and when the SS/STE signal is low, the slave is allowed to receive and send data. SPI communication is a communication based on a master-slave configuration. The party that provides the serial clock signal is the master, and the others are slaves. Figure 1 is a connection diagram between two microcontrollers in two communication modes. If there are multiple slaves in a system, the master must provide a slave selection signal for each slave to ensure that only one slave is active at any time.

In SPI communication, data is sent and received synchronously. Under the action of the serial clock signal, the host sends data through the SIMO signal line while receiving data sent by the slave through the SOMI signal line; while the slave receives data through the SIMO signal line, it also sends data to the host through the SOMI signal line. Motorola has not defined any universal SPT clock specifications, but all microcontrollers with SPI functions can set the clock polarity and clock phase by setting the corresponding registers. The setting of the clock polarity determines the effective state of the SPI serial clock when it is stationary, while the setting of the clock phase specifies when the processor sends and receives data. This is done to meet the needs of different peripherals and lines, because some peripherals latch data on the rising edge of the clock signal, while some peripherals latch data on the falling edge of the clock signal. When SPI

transmits serial data, the highest bit of the data is transmitted first. The baud rate can reach several Mbps. The actual speed depends not only on the SPI hardware, but also on the constraints of software design.

2 Synchronization of data stream

The basic characteristics of synchronous serial communication are: synchronous serial communication is transmitted in character blocks as information units, and each frame of information contains hundreds or thousands of characters. Therefore, once data transmission begins, each bit in each frame of information must be synchronized. In other words, not only the bit transmission within the character is synchronized, but also the transmission between characters must be synchronized, so as to ensure that both the receiver and the transmitter are synchronized for each bit. Obviously, this communication method has very strict requirements on clock synchronization. For this reason, both the receiver and the transmitter must use the same clock to control the synchronization between characters and bits in the data block transmission.

Regardless of the communication method, a communication protocol must be formulated. SPI communication is no exception. The communication protocol can usually be divided into three parts: syntax, semantics, and timing relationship. These three parts respectively specify the issues of "how to talk", "what to talk" and "when to talk" between the two communicating parties.

The communication protocol of synchronous communication is relatively simple. Usually, a synchronization character is prefixed to the front of the data block, and an error control character is added to the end of the data block to constitute a frame of synchronous communication data. By selecting the working mode, setting the baud rate, clock polarity and phase, and software design, data flow synchronization can be achieved.

In SPI communication between two machines or a single-chip microcomputer and a peripheral chip, the three-wire mode is often selected. In multi-party SPI communication, the four-wire SPI mode is usually used. At this time, the SS/STE signal line is used to select the slave. In the SPI communication of one master and multiple slaves, the host must provide an SS/STE signal for each slave or peripheral chip. So that only one slave or peripheral chip works at any time. If all slaves only receive data from the host and do not send data to the host, then the three-wire SPI mode can also be used. The SS/STE signal can also be used to select the host, but the communication will become very complicated. Selecting the correct working mode is the prerequisite for reliable SPI communication.

SPI communication is driven by the clock signal provided by the host. Setting the baud rate is to set the frequency of the clock signal provided by the host. Therefore, the setting of the baud rate is very important. It requires multiple considerations. When a single-chip microcomputer communicates with its peripheral devices, it may only send 1 or 2 bytes of data at a time. The baud rate can be set higher as long as it does not exceed the range allowed by the hardware. If two single-chip microcomputers communicate, then each transmission is often a group of data, otherwise the meaning of synchronous communication is lost. In this case, the running speed of the receiving party must be considered. Because whether the data is received in query or interrupt mode, the receiving microcontroller must fetch data from the receiving buffer register once after receiving 1 byte or 1 word of data. This process must be completed before the next byte or word is transmitted. In other words, the processing time cannot exceed 8 or 16 serial clock cycles; otherwise, an overflow error will occur. For example, it takes 4μs to complete this process. When the receiving buffer register is 8 bits, the baud rate of the serial clock cannot exceed 2 Mbps; when the receiving buffer register is 16 bits, the baud rate of the serial clock cannot exceed 4 Mbps. Some single-chip microcomputers have limited internal RAM and do not have enough RAM space to store intermediate data. Each byte or word of data received must be processed once. In this case, the baud rate of the serial clock needs to be set lower.

When the microcontroller communicates with its peripheral chip through SPI, the polarity and phase of the serial clock should be set according to the timing of the peripheral chip. For example, if a chip receives data on the SPI line at the rising edge of the clock signal, the host must use the falling edge without delay or the rising edge with delay clock to send SPI data. When two microcontrollers communicate SPI, the polarity and phase of the clock signal must be set the same on both sides.

In terms of hardware connection, the issue that needs attention is the polarity of the signal on the SS/STE pin after power-on reset. If the SS/STE pin is low after power-on reset, it is possible to receive 1 bit of false data. In the four-wire SPI mode, if a pull-up resistor is connected to the SS/STE pin of the slave, this situation can be avoided.

If the serial clock signal is lost or interfered during the communication process, the data stream will be asynchronous, and the communicating parties will not receive the correct data. The so-called "data stream asynchronous" means that the data bits are offset. For example, the data sent is 0xA9 and 0x36, but the received data is 0x52 and 0x6C, and the data is shifted to the right by one bit. Once this error occurs, it cannot be corrected by hardware alone. If no measures are taken in the software, it will continue to be wrong and the correct data will never be received.

The key to using software error correction is to find the number of bits offset, and then take measures accordingly to get the correct result. Generally speaking, some special characters are included in the communication data to mark the beginning and end of the data stream. When processing data, first look for these special characters. If these special characters cannot be found, it means that the data has shifted and error correction is required. The specific processing method is as follows: Assuming that the data is in bytes, use the last N bits of the previous data and the first (8-N) bits of the next data to reconstruct a new data. Among them, 1≤N≤7. Change the value of N until the special character is found in the reconstructed data. The value of N at this time is the number of bits where the data stream is offset, and then reconstruct the other received data according to this value to get the correct result. At the same time, if data needs to be sent, similar processing must be performed on the data sent out. Because if the data received by one party of the communication is offset, the data received by the other party must also have the same offset.

It is usually required that the slave starts working before the master after the system is powered on and reset. If the slave starts working after the master, it is possible to lose part of the clock signal, so that the slave does not start receiving from the first bit of the data, causing the data flow to be out of sync. Hardware delay or software delay can be used to ensure that the slave works before the master.

3 Examples

Now take the digital signal processor TMS320LF2407A and the microcontroller MSP430F135 as examples to explain how to ensure the synchronization of data flow in SPI communication. Here, the three-wire SPI mode is used, TMS320LF2407A is set as the master, and MSP430F135 is set as the slave; the clock polarity and phase of both parties are set to the rising edge without delay. The main frequency of TMS320LF2407A is 40 MHz, and it works in a timed send/receive data mode, sending one byte every 800μs, and the baud rate is 200 kHz. The reason for this setting is that the main frequency of MSP430F135 is 8 MHz, and the RAM in the chip is only 512 bytes. There is not enough RAM to save intermediate data. Each byte received must be processed once, so enough time must be left for MSP430F135 to process the data. Each round of transmission is 132 bytes, consisting of 4 guide characters 0xFF plus 128 bytes of data. MSP430F135 receives/sends data using interrupts.

The following is the SPI communication initialization subroutine of TMS320LF2407A written in assembly language:

The following is the SPI communication initialization subroutine of MSP430F135 written in C language:

The receive data processing program of the MSP430F135 also includes measures to prevent the data stream from being offset, and the implementation method is the same as described above. Figure 2 is a flow chart of the receive data processing program.

The above program is part of the control program of the switching power supply for electroplating. The DSP controller TMS320LF2407A is responsible for the control of the main circuit; the single-chip microcomputer MSP430F135 is an auxiliary controller responsible for the control of the keyboard and LCD display. The two microcontrollers exchange information through SPI communication. Practical application shows that this method is reliable for SPI communication.

4 Conclusion

SPI communication has the advantages of simple hardware connection and easy use. Taking measures combining hardware and software can ensure the synchronization of data flow in SPI communication and achieve reliable communication. Through the example of SPI communication between the digital signal processor TMS320LF2407A and the MSP430F135 single-chip microcomputer in the switching power supply for electroplating, the effectiveness of the method proposed in this paper to prevent and correct bit offset in three-wire mode SPI communication is verified.