Design of multi-protocol reader/writer based on AVR microcontroller

Introduction

Radio frequency identification (RFID) is an emerging technology that uses wireless methods to identify electronic data carriers (electronic tags). Compared with contact IC cards and barcode recognition systems, it has great advantages. The use of radio frequency identification technology can effectively realize the intelligent management of large amounts of information with wide distribution areas, and achieve the purpose of efficient and fast operation. It has broad application prospects, especially in the second-generation ID card, logistics, transportation and shipping, automatic toll collection, supermarkets, access control system management, and service fields. With the rapid development of China's national economy, the domestic RFID industry is also undergoing profound changes.

RFID systems are generally composed of readers, radio frequency cards, and application software. Among them, the design of the reader is crucial, which determines the stability and accuracy of the system.

In addition to requiring it to support a series of protocols, standards, and transceivers, there may be other functional requirements for the reader, such as high performance, anti-collision, far/near sensing distance, mobility, and power consumption.

This article explains how to use EM Microelectronic's EM4094 RFID reader/writer base station (also known as reader/writer chip, analog front-end module, base station chip, transceiver) to build a 13.56MHz general-purpose RFID reader that supports multiple protocols or meets the above-mentioned specific requirements.

Hardware structure analysis

The reader/writer generally consists of a reader/writer base station and a microcontroller (single-chip microcomputer).

Basically, the reader/writer base station (such as EM4094) is responsible for encoding/decoding data for RFID and driving the RFID reader antenna with appropriate power.

The reader/writer base station itself is driven by a microcontroller. The microcontroller is responsible for managing the frame decoding tasks of different protocols and the communication interface (serial interface, USB interface or Ethernet interface) with a PC or other background control device.

Some IC suppliers provide chips that integrate analog front-ends and microcontrollers. In many cases, the microcontroller or integrated memory space is either excessive or insufficient, and independent modules allow manufacturers to choose the microcontroller and memory capacity that best suits their design requirements.

Software Function Design Requirements

The reader needs to support all mandatory commands of ISO14443 Type A and B, Sony Felica and ISO15 693 standards, and support all instruction sets of EM 13.56MHz transceiver IC. Different communication protocols and anti-collision protocols can be implemented. The types of cards that can be read and written are as follows: • ISO 14443A&B: MIFARE® Ultralight MIFARE® Classic MIFARE® DESFire MIFARE® PROX MIFARE® PRO • lSO 15693 • ISO 18000-3 • INSIDE PicoTag • HID iClass • Tagsys C320 • eNFC • MasterCard PayPass • FeliCa • KSW TempSens • KSW VarioSens Choice of Reader/Writer Base Station Currently, there are basically three commonly used 13.56MHz multi-protocol reader/writer base stations: • Phlisps' RC632 • TI's RI-6C-001 • EM's EM4094 The chips of the three companies have their own characteristics. Considering comprehensively, EM4094 has a better cost-effectiveness. Overview of EM4094 EM4094 is an integrated transceiver chip, which can be used to build an analog front-end module for RFID readers. The chip's data transmission and reception links allow transmission and decoding of any communication protocol, so the EM4094 supports all EM's 13.56MHz transceiver chips, ISO15693, ISO14443 A&B, and Sony Felica protocols. With proper settings, the EM4094 can even communicate with NFC devices. It has the following features: • Compatible with ISO15693, ISO14443; • Oscillator using 13.56MHz quartz with optional transconductance; • Antenna drive using OOK or ASK module using single antenna drive; • High output power, 200mW high output power at 5V power supply; • ASK modulation adjustable range from 7% to 30%; • Antenna short circuit protection; • Multiple receiver inputs for highly reliable communication; • AM/PM demodulation with AGC signal amplifier; • 848kHz BPSK internal demodulator (Type B); • Multiple subcarrier compatible reception (212kHz, 424kHz or 848kHz); • Multiple subcarrier compatible decoding (Manchester, BPSK); • Built-in receive low-pass filter cutoff frequency can be detected between 400kHz and 1MHz; • Built-in receive high-pass filter cutoff frequency can be detected between 100kHz, 200kHz and 300kHz; • Optional receive gain; • Optional serial interface to program the selection bits; • 3-wire SPI controlled power reduction mode, control the on/off state; • Output power is 100mW (SO16 package), 200mW (SO20 package); • Operating temperature range -40℃ to +85℃; • Fully compatible with ISO15693 and ISO14443 protocols; • Multiple receiving inputs, high communication reliability. [page]

Schematic diagram

Pin definition

Choice of microcontroller

The EM4094 outperforms other RFID reader chips by allowing the reader manufacturer to choose the microcontroller that best suits their processing and power requirements. An 8-bit microcontroller operating at 16MHz with 8 kB of program memory seems to be the most logical choice for implementing a reader, as it can implement all relevant standards and de facto standard protocols. For more demanding RFID reader applications, 16 kB of memory will provide better programming freedom.

The EM4094 does not integrate any other frame decoders except the BPSK protocol. An integrated 848kHz BPSK decoder eliminates the need for the microcontroller to perform this demanding ISO14443 Type B special operation, allowing the reader manufacturer to choose a microcontroller with a better cost-effectiveness ratio.

EM4094 requirements for microcontrollerEM4094-

ISO15 693 protocol requirements for microcontroller • ~3800 bytes of program FLASH memory; • ~345 bytes of SRAM; • 1 timer T1 with capture mode (ICP1 feature); • 3 I/O interfaces (DOUT, DIN, DCLK); • Watchdog (settable to 2.2s); • 8MHz crystal oscillator; • No external interrupts are allowed during RFID communication; • Support ISO15693 optimized design. EM4094-ISO14443 ABC protocol requirements for MCU : • ~15k bytes of program FLASH memory; • ~500B bytes of SRAM; • 2 timers T1 and T3 with capture mode; • Watchdog (settable to 2.2s); • 16MHz crystal oscillator; • No external interrupts are allowed during RFID communication; • Provide dedicated firmware to support ISO14443 A, B, C standards. Advantages of AVR microcontrollers ATMEL's AVR series of microcontrollers is an excellent RISC structure microcontroller series. Compared with MCS51, it has the following typical characteristics: • The machine cycle of AVR is 1 clock cycle. Most instructions are single-cycle instructions. Therefore, it has a performance of nearly 1MIPS per MHz clock; • The program memory and data memory have separate buses. The program can be executed efficiently. AVR working at 8MHz is equivalent to MCS51 working at 224MHz; • Built-in reprogrammable FLASH program memory and EEPROM data memory support in-system programming (ISP) of the microcontroller. In production, it can be assembled first and then programmed, thereby shortening the process and saving the cost of purchasing a universal programmer, and the program can be easily upgraded or modified; • The built-in power-on reset circuit and watchdog timer circuit improve product reliability while reducing the cost of the circuit; • Some AVR microcontrollers are pin-compatible with MCS51 series microcontrollers, such as AT90S1200/2313 Corresponding to AT89C1051/2051, AT90S4414/8515 corresponds to AT89C51/52. Therefore, one set of PCB board can correspond to two sets of circuits, which increases the selectivity and flexibility of user stocking; • The function of timer/counter greatly enhances the baud rate during serial communication without occupying the timer. Hardware Design Notes Power Design First, let's briefly discuss the power design of EM4094. The chip has three different power pins, of which VDDA1 and VDDA2 are used to power the internal antenna drivers ANT1 and ANT2. Each driver can be powered independently. Since these two drivers may generate or synchronize large currents, it is recommended to connect a 3.3μF capacitor between the VDDA1 and VDDA2 pins to provide sufficient energy for the antenna. In addition, we also recommend connecting two capacitors with capacitance values ​​of 1nF and 100nF in parallel to the capacitor to decouple and filter the power supply. The third power pin VDD is used to power all other internal modules. On this power line, the engineer will have to insert two filter capacitors with capacitance values ​​of 1nF and 100nF respectively for the same reasons mentioned above. They are preferably ceramic capacitors made of dielectric materials such as COG and X7R, because of their small tolerance and high temperature stability. It is important here that the same voltage (3.3V or 5V) should be applied to these three power lines. These power lines should also be connected to the analog ground. Oscillator Input The external crystal connected to the two pins OSCIN and OSCOUT provides a 13.56MHz signal, which will be sent to the output of the antenna driver. Two NPO capacitors across the crystal are used to ensure the start-up and stability of the crystal. The NPO capacitor value is determined by the selectable transconductance of the EM4094 (selected by a register flag) and the crystal parameters. Figure 1 Working Schematic Bandgap Reference Output (AGD) The bandgap reference voltage is used as an analog reference voltage by different internal modules. To ensure the stability and reliability of the card reader chip, it is very important to properly decouple the AGD voltage with a 1nF and 100nF capacitor. As mentioned above, we recommend using ceramic capacitors made of COG or X7R dielectric materials. Antenna Driver Outputs ANT1 and ANT2 are two outputs of the antenna driver that can be driven in phase or in antiphase, which makes it possible to connect the reader antenna in different ways and produce four different antenna power levels depending on the selected structure. The EM4094 can also be used with a remote antenna. In this case, the output impedance of the EM4094 must match the impedance of the communication line. If a coaxial cable is used, the output impedance of the EM4094 will have to be adjusted between 10 ohms (ANT1 optional) and 50 ohms when only one antenna driver is used; when two antennas are used in parallel, the output impedance of the EM4094 will have to be adjusted between 5 ohms (ANT1 optional) and 50 ohms. To achieve a good impedance match, developers can choose to use an LC PI network and select appropriate component parameter values ​​with the help of Smith charts. If the reader antenna can be integrated on the same PCB board as the EM4094, you can use the direct antenna connection method (see Figure 2). In this case, the antenna and the series capacitor form an LC series loop. The resonant frequency of this loop is the reader frequency. The series resistor is used to suppress the quality factor and set the antenna current below the EM4094 rating. When the antenna operates at its resonant frequency, a higher power can be obtained by connecting the antenna directly. For different ways to connect the IC antenna, refer to the EM4094 application guide.

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Figure 2 Pin Definition

Transceiver Signal Reception

RFIN1 and RFIN2 are two input pins on the IC receiving chain. They are used by EM4094 to demodulate the data stream sent by the transceiver. The voltage on the pin must be set between GND and VDD. The two demodulation inputs must have the same performance and show the same sensitivity. With an external matching impedance circuit, these two inputs can be used to demodulate the input phase or amplitude modulation signal. The unused input pin should be connected to the analog ground through a 10nF capacitor. The high sensitivity of the input pin allows the reader to have a long reading distance even at the minimum power level of the electronic tag.

Table 1


Shutdown of the reader chip

EN pin is used to enable or shut down the reader IC. This input pin can be controlled by an external microcontroller. When the EN pin is high, the EM4094 enters the active mode, and its output generates a 13.56MHz signal on the antenna; when the EN pin is low, the reader chip enters the sleep mode, which can greatly reduce the power consumption of the reader chip. This feature of the EM4094 is particularly useful when designing handheld card readers, as it can increase battery life.

Data Input and Output

In SPI mode, the DIN pin is used to input data, the DOUT pin is used to output data, and the DCLK is used as the SPI clock signal. An SPI interface can be used to set the internal bit registers of the card reader chip and set the parameters of different modules. In normal mode, the antenna driver is turned on or off by applying a logic level on the DIN pin, and the response information sent by DIN can be read directly on the DOUT pin.

Security Function

Many current RFID applications use encryption algorithms to encrypt data or prove identity. Some encryption algorithms are public, while others are not. Some vendors provide their unique encryption algorithms in source code or object code, or in other independent security elements (such as SIM cards). Of course, a variety of options make the design very flexible. You can implement one or more algorithms in a traditional microcontroller or a secure controller. Another option is to build an interface with an independent element responsible for security operations. Of course, it is also possible to mix the two solutions. EM provides its proprietary encryption algorithm through the SIM card.

Firmware Programming

Program Hierarchy Division

The firmware structure is divided into several layers, each with a specific function:

• Level1 – performs decoding tasks;

• Level2 – performs low-level data transmission and conversion tasks;

• Level3 – performs upper-level data transmission tasks--- main loop, bootloader and simcard;

• Level4 - performs UART communication tasks.

Main Programming

• Main loop (level3) periodically queries the UART receive buffer (level4) and executes the corresponding tasks according to the valid commands. All executed tasks will return information, including task errors.

• UART data reception is performed asynchronously. The next command will only be executed after the response to the previous command is completely sent.

• The commands for communication with the card are usually controlled by hardware timers (T0, T1, T2, T3 for reception and T1 for transmission).

• The timer count value is completed by the AVR clock signal.

• Some programs need to be triggered by interrupts, which requires high capture capabilities.

• Like some other important tasks, the tasks of sending (level2) and capturing (level1) can be performed in parallel without interfering with each other.

Data Processing

The application software prepares the command subsection for the Uplink (send) task. All tasks put the data bit stream to be sent into the data_buffer array. In order to separate the foreground capture program from the background processing, the capture task stores the information into a pair of arrays. [data bit, validity bit]. Through the level1/store_bit function, the pair of information obtained by the capture task is stored in the capture array indexed by the capture_cnt and capture_bit_count variables. The capture buffer must be initialized before performing the capture; the data bit is 0 and the valid bit is 1. All bits are valid. The received data can be searched in the background. This logic can give an orderly and definite information without the need for asynchronous processing or priority reentrant interrupt processing.

Conclusion

Wireless radio frequency identification has the characteristics of large amount of information, high efficiency, convenience and security, and is the mainstream technology for automatic identification. The research and development of low-cost, high-reliability electronic tag reading terminals has great practical significance. Based on the research and analysis of the working principle of the system, this paper gives a hardware implementation solution of a complete radio frequency card reading and writing system composed of an AVR microprocessor chip and an RFID reading and writing base station. The system structure and cost are reasonable, the reliability has been verified by experiments, and it has good application value.