ISP Online Programming Design of Single Chip Microcomputer

With the development of electronic technology, the scale of chips is getting larger and larger, and the packaging is becoming smaller and smaller. Correspondingly, the difficulty of system board-level debugging is also increasing. In the traditional debugging method, frequent debugging and program replacement require frequent plugging and unplugging of chips, and the development efficiency is extremely low. The ISP online programming technology provided by the AT89S series of microcontrollers has completely changed the traditional development model. When developing the microcontroller system, the pins of the chip will not be damaged, which accelerates the listing of products and reduces R&D costs, shortens the time from design, manufacturing to on-site debugging, simplifies the production process, and greatly improves work efficiency. Therefore, it is an economical and effective way to upgrade and maintain market-standard products on-site, which greatly promotes the development of PLD products.

1 PC parallel port

1.1 Introduction to Parallel Port Hardware Interface

The standard parallel port has 25 pins, of which data port pins are 2 to 9, status port pins are 15, 10 to 13, control port pins 1, 14, 16, 17 are used to connect devices, and the other pins 18 to 25 are ground pins GND. The 25-pin parallel port is shown in Figure 1.

Figure 1 25-pin parallel port

The parallel port works in SPP mode, and the PC controls them by reading or writing three 8-bit port registers. The port registers are:

◆ The data port (address 0x378) is D7~D0, corresponding to pins P9~P2;
◆ The status port (address 0x379) is S7~S3, corresponding to pins P11, P10, P12, P13, P15;
◆ The control port (address 0x37A) is C3~C0, corresponding to pins P17, P16, P14, P1.

Note: The logic state of the S7, C0, C1, and C3 signals at the connector is opposite to the corresponding register bits. When writing to these bits, the written value should be opposite to the value set at the connector; similarly, when reading, the read value should also be opposite to the value set at the connector.

1.2 Introduction to Parallel Port Programming

Windows has adopted a shielding strategy for the underlying system operations. However, in hardware or system software development, as long as the underlying system operations are involved, you have to go deep into the Windows kernel to write system-level device drivers. This is the case for parallel port read/write operations. In order to bypass the Windows security protection mechanism, it is necessary to allow 32-bit Windows programs to directly operate the I/O port. Here, several functions in the WinIo library written by Yariv Kaplan are used to implement the read/write of the I/O port.

(1) Initialization and termination
The port must be initialized and terminated before and after reading/writing.
InitializeWinIo();
ShutdownWinIo();

(2) Installation and uninstallation
If the operating system is Windows 98 or Windows 95, you need to call the driver function.
InstallWinIoDriver(PSTR pszWinIoDriverPath, bool IsDemandLoaded = false);
RemoveWinIoDriver();

(3)  读/写I/O口
GetPortVal(WORD wPortAddr, PDWORD pdwPortVal, BYTE bSize);
SetPortVal(WORD wPortAddr, DWORD dwPortVal, BYTE bSize);

The GetPortVal function reads a BYTE/WORD/DWORD value from the specified port; the SetPortVal function writes a BYTE/WORD/DWORD value to the specified port; wPortAddr specifies a port address value; pdwPortVal is a pointer to a double-byte variable that stores the value read from the wPortAddr port; dwPortVal is a double-byte variable written to the wPortAddr port; bSize specifies the number of bytes to read, and the value can be 1, 2, or 4.

2 AT89S5X series microcontroller

2.1 Introduction to AT89S51

AT89S51 is a low-power, high-performance CMOS 8-bit single-chip microcomputer, with 4 KB ISP (InSystem Programming) Flash read-only program memory that can be repeatedly erased and written 1,000 times. The device is manufactured using Atmel's high-density, non-volatile storage technology, compatible with the standard MCS51 instruction system and 80C51 pin structure, and integrates a general-purpose 8-bit central processor and ISP Flash storage unit in the chip. The powerful AT89S51 can provide cost-effective solutions for many embedded control application systems.

2.2 AT89S51 serial programming timing and instructions

2.2.1 Timing Analysis in Serial Programming Mode

2.2.2 Serial Programming Instructions

Serial programming uses a 4-byte protocol and the instructions are listed in Table 1.

Table 1 Serial programming instructions

3 Parallel port and AT89S5X single chip microcomputer hardware design

Through the analysis of parallel port and programming timing, we made the ISP download line of AT89S5X microcontroller. The following is a brief introduction to the connection between parallel port and microcontroller: parallel port P2 pin is connected to the microcontroller P1.5 pin (MOSI); parallel port P10 pin is connected to the microcontroller P1.6 pin (MISO); parallel port P1 pin is connected to the microcontroller P1.7 pin (SCK); parallel port P17 pin is connected to the microcontroller RST pin, as shown in Figure 2.

Figure 2 AT89S52 download line circuit diagram

4 ISP download line software design

Based on the hardware design, the download line program was written using Visual C++6.0 through the analysis of ISP timing and serial programming instructions. Its main key programming functions are omitted - Editor's note.

Conclusion

The following are some parameters obtained by the author during debugging, I hope it will be helpful to everyone.

References:

The frequency of the crystal oscillator is 33 MHz (MAX), so the period T=1/F=1/33 MHz=30 ns (MIN); the positive pulse width of SCK is 8×30 ns=240 ns (MIN); the negative pulse width of SCK is 8×30 ns=240 ns (MIN); the time from MOSI establishment to SCK becoming high is 30 ns (MIN); the MOSI hold time after SCK becomes high is 2×30 ns (MIN); the time from SCK becoming low to MISO being valid is 10 ns (MIN) ~ 32 ns (MAX) (generally 16 ns); the chip erase instruction cycle is 500 ms; the serial byte write cycle is 64×30 ns+400 ns.

Experimental data:

The frequency of the crystal oscillator is 33 MHz (MAX), so the period T = 1/F = 1/33 MHz = 30 ns (MIN); the chip erase instruction cycle is 200 ms; the MOSI hold time after SCK goes high is 1 ms (MIN).