The power compensation control system with 80C196KC single chip microcomputer as the core samples the three-phase voltage and current through analog input circuit, and controls the switching of capacitors through output unit after calculation, so as to realize the compensation of reactive power of power grid. This paper introduces the design method of system hardware and software.
introduction
At present, there are many compensation methods in the power compensation system. The compensation system in this paper is based on the optimization of the minimum negative sequence current. The system calculation requires sampling of the single-phase voltage u and current I within 20 ms of one cycle of AC power, and the sampling times in one cycle are required to be at least 100 times. In view of this feature, a control system based on 80C196KC is designed. Intel's high-performance 16 b single-chip microcomputer 80C196KC has a fast computing speed and can meet the requirements of high-speed sampling of the system.
1 System Hardware Design
The hardware part of this system is mainly composed of four parts: sampling input circuit, central control unit, program storage unit, and output drive circuit. The overall block diagram of the system is shown in Figure 1.
1.1 Analog Input Circuit
The sensors used for data acquisition in the system are voltage transformers and current transformers. The voltage and current of the three phases need to be collected separately, requiring a total of six inputs. The 80C196KC has a successive approximation A/D converter with a total of 8 input channels. Its input pins ACH0~ACH7 are shared with P0.0~P0.7. The internal A/D converter is 8 b/10 b adjustable and has its own sampling and holding circuits, which reduces peripheral circuits, interference and interference sources, increases the stability and anti-interference of the system, and reduces the size of the control board. In this system, the 10 b conversion method is used.
In order to protect the A/D converter and increase reliability, an input interface circuit as shown in FIG. 2 may be used at the input end of the A/D channel.
Two diodes D1 and D2 act as overload protection. When the input voltage is higher than VREF+0.7 V, D1 is turned on and the input level is clamped at VREF+0.7 V; when the input voltage is lower than -0.7 V. This overload is often a spike interference and lasts for a short time. The technical conditions of MCS-96 stipulate that the voltage of the analog input terminal to the analog ground ANGND cannot be lower than -0.3 V, which can be guaranteed by the low-pass filter R4 and C1 at the input terminal. The time constant of this filter in the figure is τ=R4C1=270×0.01=2.7μs. If -0.7 V is used as the step input of this filter, it takes time for the output of this filter (i.e. the analog signal input terminal of 80C196KC) to reach the level of -0.3 V:
t = -τln(1-0.3/0.7) = 1.15μs
Usually, the peak duration of this type of spike noise is much shorter than the above time, so this input circuit can effectively play the role of overload protection.
1.2 Central Control Unit
80C196KC is a new branch of CHMOS high-performance 16b microcontrollers, with an internal EPROM/ROM of 16b, an internal RAM of 488b, and 24b of dedicated registers. The 80C196KC uses a "vertical window" structure, so that the newly added 256b RAM can also be accessed as a general register through window mapping. 80C196KC can use a 16MHz crystal oscillator, and the internal clock is divided by 2. Its running speed is 33% faster than the 12MHz 80C196KB and 1 time faster than the 12MHz 8096BH. The minimum circuit refers to the minimum peripheral devices added to make the microcontroller work, generally including a reset circuit and a crystal oscillator. The minimum circuit of 80C196KC is shown in Figure 3.
1.3 Output Unit
There are 12 outputs in total, of which P1.0~P1.3 control phase A, P1.4~P1.7 control phase B, HSO.0, HSO.1, P2.6, and P2.7 control phase C. The output is isolated by the photo-controlled thyristor MOC3061, and then driven by a first-level bidirectional thyristor, and then added to the control stage of the bidirectional thyristor to control the conduction of the bidirectional thyristor, thereby controlling the switching of the capacitor. The output circuit is shown in Figure 4.
The signal current output from the output pin of 80C196KC is only a few μA, which is not enough to drive the photocoupler behind it, so a TTL chip 5407 is added as a current driving element. MOC3061 is a commonly used photocoupler with bidirectional thyristor output. Its output end is a photosensitive bidirectional thyristor. When 15 mA current flows into the input end of the photocoupler, the thyristor is turned on. The output end of MOC3061 is also equipped with a zero-crossing detection circuit to control the zero-crossing triggering of the thyristor to reduce the impact of electrical appliances on the power grid when they are turned on.
2 Software Design
The system software is written in high-level language PL/M-96 embedded in assembly language and adopts modular structure design. For parts with high real-time requirements such as A/D conversion, assembly language is used to write A/D conversion program because of its good flexibility and fast code conversion speed. At the same time, the instruction system of 80C196KC is efficient and fast in execution. Other parts are written in high-level language, which makes the program readability good.
The whole software consists of 7 parts, namely: main program, A/D conversion subroutine, switching subroutine, voltage switching subroutine, current calculation subroutine, output subroutine, software timer interrupt service program. The following introduces the design of the main program and A/D conversion subroutine.
2.1 Main program design
The main program flow chart is shown in Figure 5.
2.2 A/D conversion subroutine
Data sampling is completed by combining A/D conversion with the interrupt service routine of the software timer. At the beginning of each cycle measurement, the main program determines the analog channel; the software timer is used for timing, and then the A/D conversion is started. When the software timer timing time is reached, the software timer interrupt service routine is entered, and the software timer interrupt service routine returns to the main program to complete a cycle of sampling process.
The A/D conversion subroutine flow chart is shown in Figure 6.
The software timer interrupt subroutine in the system is written in the high-level language PL/M. The attached program is as follows:
Timing 20 ms program:
hso_command=18h;/*Use software timer 0, interrupt mode*/
hso_time=timer1+15000; /*timing 20 ms*/
3 Conclusion
The compensator has no contact, no heat, small impact, zero-crossing switching, safe and reliable, and maintenance-free. The control part uses the 80C196KC single-chip microcomputer as the core controller, realizing automatic compensation and unattended operation. It solves the problems of unreliable contact switching, high failure rate, high maintenance and short service life in the past.
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