Railway station automatic voice broadcast system based on ISD4004 single chip microcomputer

The author successfully applied ISD4004 and AT89C51 single-chip microcomputer to design the railway station signal automatic voice broadcast system. Through the detection and collection of multiple signals such as the up and down control of the railway line of the railway station, vehicle dispatching, and the activation of the main and auxiliary power supplies of the system, according to the prevention requirements of safety hazards, the single-chip microcomputer controls the query and broadcast of safety warning voice information to achieve safety operation prompts and alarms. The system is installed and used on the control console of the railway station signal room, with stable operation and accurate signal broadcast, and has achieved good results.

1 Hardware Circuit Design

The principle block diagram of the system hardware circuit design is shown in Figure 1, which consists of microcontroller AT89C51, ISD4004 voice circuit, audio power amplifier circuit, programmable parallel interface 8255, optoelectronic isolation, level conversion, signal input interface, system clock, reset and keyboard unit circuits.

1.1 Features of ISD4004

The ISD4004 series voice storage chip adopts CMOS technology, contains oscillator, anti-aliasing filter, smoothing filter, audio amplifier, automatic squelch and high-density multi-level flash storage display, and built-in microcontroller serial communication interface. All chip operations must be controlled by the microcontroller, and the operation commands can be sent through the serial communication interface (SPI or Microwire). The external sound source signal adopts multi-level direct analog storage technology in the chip, and the information can be processed in multiple sections. Each sample value is directly stored in the flash memory on the chip, so it can reproduce voice, music, tone and effect sound very realistically and naturally. The information stored in the flash memory on the chip can be saved for 100 years in the case of power failure. The chip has an operating voltage of 3 V, an operating current of 25-30 mA, a maintenance current of 1μA, no power consumption, a single-chip recording and playback time of 8-16 minutes, and can record repeatedly 100,000 times.

1.2 Pinout and package of ISD4004

ISD4004 adopts 28-pin SOIC package, and its pin arrangement is shown in Figure 2.

1.3 Interface between ISD4004 and AT89C51 MCU

ISD4004 works on the SPI serial interface. According to the SPI protocol of synchronous serial data transmission, all serial data transmission starts at the falling edge of the chip select signal SS sent by the microcontroller master to ISD4004. SS must be kept at a low level during transmission and kept at a high level between two instructions. The data from the serial data input terminal MOSI pin is latched at the rising edge of the serial synchronous clock, and the data from the serial data output terminal MISO pin of ISD4004 is shifted out at the falling edge of SCLK. Any recording and playback operation (including fast forward) of ISD4004 is performed according to the segment address. Each segment contains several rows, and each row is equivalent to a storage unit. The storage management of recording and playback information is performed under the control of the row address clock signal RAC. The RAC signal cycle is 200 ms, and the high-level duty cycle is 3/4. When the recording and playback operation reaches the end of the internal storage unit address, an OVF or EOM end mark signal will be generated. If EOM or OVF is encountered, a low-level effective INT interrupt signal will be generated. The interrupt status will be cleared at the beginning of the next SPI cycle. The connection between ISD4004 and AT89C51 microcontroller is shown in Figure 3.

The chip select signal SS pin of ISD4004 is connected to the I/O port P1.0 of the AT89C51 microcontroller, and the program instruction generates an effective low-level signal. The serial data input MOSI pin and the serial data output MISO pin are connected to P1.1 and P1.3 respectively. The serial data information received and sent is latched by the on-chip shift register under the control of the program instruction, and its synchronous clock signal SCLK is controlled by the microcontroller P1.2. The row address clock RAC and the interrupt request signal INT are connected to P3.2 (INT1) and P3.3 (INTO) respectively.

1.4 Audio Output

The prompt voice corresponding to the system signal, such as "upward train is coming, section occupied", "upward departure request, signal open", etc., has been solidified into the storage unit of the E2PROM inside ISD4004 by address segmentation through special equipment. Under program control, the corresponding voice signal is output from the 13th pin (AUOUT) of ISD4004, and is sent to the low-noise power amplifier integrated circuit for amplification through the coupling capacitor C4 and the volume control potentiometer RW to drive the speaker to sound. In order to minimize the output voice noise, the analog ground and digital ground of the system are routed separately, connected as close to the power supply end as possible, and respectively led to the VSSA and VSSD pins of the ISD4004 chip. The decoupling capacitor should also be as close to the chip as possible.

1.5 I/O port expansion

The system's 36 signals need to be processed by the microcontroller, and at least 36 I/O lines are required to meet the demand. The remaining I/O ports of AT89C51 are obviously not enough, and the I/O ports must be expanded. The system uses the programmable parallel input and output interface chip 8255 to expand the insufficient I/O ports. The specific hardware connection is shown in Figure 4. 8255 is a standard peripheral parallel interface circuit used in microprocessor expansion systems. It is manufactured using NMOS technology and is packaged in a 40-pin dual in-line DIP format. 8255 exchanges information with external devices through 24 I/O lines of ports A, B, and C, each of which is 8 bits. Among them, port C is divided into upper port C (PC7~PC4 high 4 bits) and lower port C (PC3~PC0 low 4 bits). The port's working mode can be set to input through programming, which is completed when the master control program is initialized. The 8255 chip select signal is completed by P1.4, and the address buses A0 and A1 are locked by the address latch 74LS373.

1.6 Signal transformation

The system signal is taken from the contact of the control relay in the station signal room, which is mainly an AC 24 V switch signal. It must be converted into a TTL level that can be matched by the single-chip system, that is, the AC 24 V is converted into a DC 5 V. The signal level conversion circuit is shown in Figure 5. The AC signal is rectified by the diode D32, filtered by the capacitor C32, and input into the photocoupler 4N25 through the current limiting resistor R32. The photoelectric conversion is effectively realized through the internal light-emitting tube and the photosensitive receiving tube. At the same time, the electrical network of the external signal is isolated from the single-chip control system, improving the reliability and anti-interference ability of the system. The output signal after conversion is a low level. In order to keep the input signal and the output signal level synchronized, an inverter is added in the later stage to output a standard TTL 5 V signal and send it to the parallel interface 8255.

2 Overall software design

The system software design directly affects the overall performance of the system. The main function of the software is to accurately determine whether the signal is valid by real-time querying the railway signal, and reliably find the voice storage address corresponding to the signal, and retrieve the information for real-time broadcasting. The software program includes the main control program, signal query program, voice broadcast program, data transmission program, and ISD4004 power-on and power-off program. The delay subroutine is used many times in the program. Due to its simple structure and strong versatility, it will not be elaborated in this article.

2.1 Main control program

The main control program flow is shown in Figure 6. When the system is powered on, it needs to be initialized, clear the I/O port, signal unit and signal flag bit, and initialize the ISD4004 and 8255. It also completes the self-test and voice broadcast of product information advertisements when the system is powered on. Then it enters the signal query and voice broadcast loop control flow. In order to prevent the system from false alarms, missed alarms or continuous alarms, factors in this regard are fully considered during program design, such as using signal delay anti-shake judgment, signal level high and low interlaced flag judgment and signal unit address lookup table to improve the reliability of the system.

2.2 Signal query subroutine

The flow of the signal query subroutine is shown in Figure 7. The system 30 multiple signals occupy part of the I/O lines of the AT89C51 microcontroller and the 24 input lines of the A, B, and C ports of the programmable interface 8255. The program queries the multiple signals one by one, and stores the incoming valid signals in units so as to pass the parameters to the main control program.

2.3 Voice Broadcast Subroutine

All operations of the ISD4004 chip must be controlled by the operation commands of the microcontroller, which are sent in through the serial communication protocol SPI interface. The SPI control register controls the recording and playback, information retrieval, power-on, power-off, start and stop functions of the chip, which are realized by changing the control bits of the SPI control register through software programming instructions. The control bits of the SPI control register are shown in Figure 8. The instruction format is: 8-bit control code + 16-bit address code. Any operation of ISD starts when the run bit C4 is set to 1 and ends when it is set to 0. If EOM or OVF is encountered, an interrupt is generated. When the "read" instruction is used to move the interrupt status bit out of the MISO pin of ISD, the control and address data are also synchronously moved in from the MOSI end. Therefore, it is necessary to pay attention to whether the data moved in is compatible with the current operation of the device. Of course, it is also allowed to execute the read status and start a new operation at the same time in one SPI cycle (that is, the newly moved in data may be incompatible with the current operation of the device).

The voice broadcast subroutine should be programmed strictly in accordance with the requirements of ISD4004 above. The process is shown in Figure 9. When the system confirms that the current broadcast signal is valid, it obtains the 16-bit broadcast address by searching the voice storage address. First, it needs to call the electronic program, send the power-on instruction, and then wait for a delay of about 25μs, and then send the 16-bit playback start address parameter and the 8-bit instruction to start playing from the specified address, and then call the data sending subroutine to complete the information broadcast.

2.4 Data sending subroutine

The data sending subroutine flow chart is shown in Figure 1O, which mainly transmits the 16-bit playback address and 8-bit function control instruction data to the MOSI of ISD4004 under serial clock synchronization according to the SPI protocol standard.

2.5 Power on and power off procedures

ISD4004 can manage the power operation mode and complete the power-on and power-off operations through instruction programming. The program flow chart is shown in Figures 11 and 12. After the chip is powered off, it enters a low-power state with a current consumption of about 1μA. The chip can only work normally after the power-on operation is completed.

3 Conclusion

This paper describes an example of the actual application of a single-chip microcomputer controlled voice broadcast system based on the ISD4004 chip in the signal control room of a railway station. It mainly introduces the design methods of the system's software and hardware. Its purpose is to provide a microcomputer control module for multi-channel industrial process control online voice prompts or alarms. With a little modification, it can be conveniently used with conventional industrial control systems or equipment, and can even be conveniently used with complex systems and DCS systems to complete the working status alarms and operation prompts of various industrial control and monitoring systems.