As the electronic product market continues to expand, flash memory will undoubtedly achieve great growth. This growth depends largely on the non-volatility, low power consumption, high density and light weight of the memory. The combination of multiple advantages has made flash memory widely used in mobile electronics and embedded fields. Nand-Flash is cheap and sufficient, with a high cost performance, and is very light and shock-resistant. It is very suitable for digital products. The storage capacity of a single-chip nandFlash chip can now reach 4 GB. It is hard to imagine that such a capacity can be achieved in a chip that is only 12×20×1.2mm in size. However, due to the large number of Flash pins, small size, and inconvenient disassembly after use, the development of an online burning system has become an indispensable step in the field of embedded development.
1 NandFlash Introduction
NOR and NAND are the two main non-volatile flash memory technologies on the market today. Intel first developed NOR flash technology in 1988, which completely changed the situation where EPROM and EEPROM dominated the market. Then, in 1989, Toshiba released the NAND flash structure, which emphasizes reducing the cost per bit and providing higher performance, and can be easily upgraded through the interface like a disk. NandFlash is an ideal solution for high data storage density. It can achieve high storage density and has fast writing and erasing speeds. The difficulty in applying NAND lies in the management of flash and the need for special system interfaces. Nand-Flash devices use complex I/O ports to access data serially, and the methods of each product or manufacturer may be different. It uses 8 pins to transmit control, address and data information. NandFlash uses 512-byte blocks for read and write operations, which is a bit like such operations managed by hard disks. In this way, NandFlash-based memory can naturally replace hard disks or other block devices because it can also erase and reprogram blocks of memory cells called blocks. The write operation of any flash device can only be performed in empty or erased cells, so in most cases, it must be erased before the write operation (the maximum number of erases and writes per block in NandFlash flash memory is one million times). In short, the storage systems of digital devices such as USB flash drives, MP3 and MP4 that are common on the market are all implemented using NandFlash storage chips.
2 Online Burning System Architecture
The entire burning system introduced in this article consists of three parts. The PC provides the data to be burned through the PCI bus and is responsible for controlling the PNX1051 DSP, while the DSP is responsible for parsing the commands and data sent by the upper PC to control the communication timing of NandFlash and the realization of burning by controlling the GPIO pins. Figure 1 shows the system structure block diagram of the burning system.
PNX1501 is an audio and video processing chip launched by Philips. The working frequency of the chip is 300 MHz, and it has a rich communication interface, which can support DDR, SDRAM, Nand-Flash, NorFlash and IDE. In addition, it has more than 30 GPIO pins that can be used as ordinary IO to control peripheral chips. This system is only used to realize the burning of NandFlash bare chips, so it does not use its own NandFlash interface, but uses GPIO direct control, which is more flexible in timing and logic. The communication between DSP and computer is realized through PCI bus. In addition, DSP has 32MB DDR external expansion. The NandFlash uses GPIO0~GPIO7 as data port and GPIO8~GPIO12 as control signal pin. For the dedicated burning devices on the market, the bottleneck of its burning speed lies in data transmission. At present, the data transmission speed of most burners is very low and their own cache is very small. The burning process requires frequent data communication with the PC, so when burning a relatively large file system, it takes a long time and the operation is extremely complicated. More importantly, it cannot be burned online. Once the finished product needs to be updated, the Flash chip must be removed. For this system, the PCI transmission bandwidth can reach 133 MB/s, even a large file system can be quickly transmitted. In addition, since it is burned online, there is no need to disassemble the Flash, so it is very convenient for product updates. The HY27US08121M NandFlash selected in this system is a 64MB Flash produced by Samsung. The block erase time of this device is 2ms and the page write time is 0.5 ms, which can achieve high-speed reading and writing. [page]
3 System Software
At present, the storage space of Flash in the market is managed in blocks. Each block is 32 pages in size. Each page contains 512 bytes of valid data space and 16 bytes of spare space. The valid data is used to store actual data, and the spare area is used to store additional descriptive information of the valid data (ECC, bad block information, index number, etc.). Different file systems have different data structures, of which the two most important parts are ECC and bad block information. Bad block information is usually represented by the 6th byte of the spare area of page 0 or page 1 of the block (0xFF is valid, and the rest are invalid). ECC is the check value obtained after a series of XOR checks on all valid data, usually 3 bytes (512 bytes check) or 6 bytes (256 bytes check). Due to the manufacturing process, Nand-Flash may produce bad blocks during the production process. For bad blocks, the storage information may be lost and cannot be used. Each Flash has the original bad block information written into the Spare area of page 0 and page 1 of each block before leaving the factory. When erasing, you must first check whether it is a bad block, otherwise the bad block information will be erased (and can never be restored). In addition, in order to ensure the reliability of stored information, ECC verification can be introduced when reading data from NandFlash, and a new ECC is calculated for each 512-byte page of data read, and compared with the ECC stored in the Spare area of the page. In this way, 1-bit flips can be corrected, or flips of more than 2 bits can be detected.
The burning file in this system adopts 6-byte ECC according to the Philips protocol. Since NandFlash manages data in blocks and pages, the data should be mapped according to the Nand-Flash structure on the PC side. The code is as follows:
After that, the burning file data can be filled into DataBuf. After filling every 512 bytes, ECC and other Spare interval contents are calculated. When 32 pages are filled, a new data structure can be opened and hung in the linked list.
The communication between PC and DSP is the key of this system. You can use the message method when designing, or you can open a shared area in the external DDR of the receiving DSP, and then the PC directly writes the data, and then sends a command to burn it. This system adopts the second method. For Philips' DSP, the DSP has mapped all its DDR space to the physical space of the PC in the driver, so you can directly add a simple interface function in the driver SDK to send the address of the shared area opened by the DSP to the PC through the message method, so that the PC can directly read and write the area. The specific code of this operation is as follows:
In this way, when the DSP receives the burning command sent by the PC, the system can read the contents of the shared buffer and start burning the Flash. The specific process is shown in Figure 2, and some function source codes are as follows:
The specific timing during design can refer to the timing circuit provided by the chip data to control the MMIO register to realize the control of GPIO, which will not be repeated here. It should be noted that NandFlash may fail and generate bad blocks during the burning or erasing process. For the treatment of bad blocks. Different systems have different methods, mainly direct Skip and Reserved Block Area (using reserved blocks), etc. This system uses the former method. In addition, for the sake of reliability, the ECC check should be performed on the block data that has been successfully burned if time permits, that is, all data is read to calculate the ECC and compare it with the ECC calculated before burning to determine whether a bit flip has occurred, so as to determine whether the burning is correct. If more than two bits of flip occur, it means that the block is burned incorrectly, and a new block should be selected for burning and the original block should be marked as a bad block.
4 Conclusion
Although DSP external Flash programming is not a key technology, it plays a vital role in the entire DSP embedded system development process. How to conveniently and quickly burn the boot file (BootLodaer) and the file system is an important link that directly affects the production and update of the product. This system can quickly and easily burn all the initial startup files. Actual tests have proved that it only takes less than 3 minutes to burn a 40 MB file system, which is superior to general programming devices in terms of speed and economy.
Previous article:ATtiny25/45/85 microcontroller circuit board production
Next article:Application of synchronous queue serial interface QSPI
Recommended ReadingLatest update time:2024-11-16 20:40
Professor at Beihang University, dedicated to promoting microcontrollers and embedded systems for over 20 years.
- Innolux's intelligent steer-by-wire solution makes cars smarter and safer
- 8051 MCU - Parity Check
- How to efficiently balance the sensitivity of tactile sensing interfaces
- What should I do if the servo motor shakes? What causes the servo motor to shake quickly?
- 【Brushless Motor】Analysis of three-phase BLDC motor and sharing of two popular development boards
- Midea Industrial Technology's subsidiaries Clou Electronics and Hekang New Energy jointly appeared at the Munich Battery Energy Storage Exhibition and Solar Energy Exhibition
- Guoxin Sichen | Application of ferroelectric memory PB85RS2MC in power battery management, with a capacity of 2M
- Analysis of common faults of frequency converter
- In a head-on competition with Qualcomm, what kind of cockpit products has Intel come up with?
- Dalian Rongke's all-vanadium liquid flow battery energy storage equipment industrialization project has entered the sprint stage before production
- Allegro MicroSystems Introduces Advanced Magnetic and Inductive Position Sensing Solutions at Electronica 2024
- Car key in the left hand, liveness detection radar in the right hand, UWB is imperative for cars!
- After a decade of rapid development, domestic CIS has entered the market
- Aegis Dagger Battery + Thor EM-i Super Hybrid, Geely New Energy has thrown out two "king bombs"
- A brief discussion on functional safety - fault, error, and failure
- In the smart car 2.0 cycle, these core industry chains are facing major opportunities!
- The United States and Japan are developing new batteries. CATL faces challenges? How should China's new energy battery industry respond?
- Murata launches high-precision 6-axis inertial sensor for automobiles
- Ford patents pre-charge alarm to help save costs and respond to emergencies
- New real-time microcontroller system from Texas Instruments enables smarter processing in automotive and industrial applications
- LPC4357 internal EEPROM read and write problem
- Patch Microstrip Filter Example
- 【AT-START-F425 Review】USB to CAN Part 3
- 2.4-GHz Bluetooth low energy and proprietary system-on-chip
- [Synopsys IP Resources] CDC Verification: One of the Biggest Challenges in Multi-Billion-Gate ASIC Design
- Want to buy Dahua DH-PHSA1.2-SH and DH-PHSA1.5-SH LED modules
- Microphone sound signal extraction and processing
- 5G will change the way we surf the Internet. Will each of us have a small base station?
- Learning to use FPGA to implement video and image processing design
- [Review of SGP40] Rapid deployment of AI ambient air quality tracking model #1 Unboxing