Research on the Setting and Application of MCU Reset Flag Bit

introduction

Setting the reset flag bit is convenient for distinguishing resets caused by different reasons. As a new technology, it is adopted by more and more new microcontrollers. For example, the P87LPC700 and P89LPC900 series of Philips Company, the MC68HC05 series and MC68HC08 series of Freescale Company (formerly Motorola Semiconductor Division), the SPMC65 series of Sunplus Company, the PIC series of Microchip Company, etc., are all designed internally specifically for recording various reset flags. status register.

The MC68HC08 series has a reset status register, which is responsible for recording 6 reset flags: power-on reset, pin reset, watchdog reset, illegal instruction reset, illegal address reset and undervoltage reset. The SPMC65 series has a system control register that is responsible for recording five types of reset flags: power-on reset, external reset, watchdog reset, illegal address reset and undervoltage reset. The 51-compatible P89LPC900 series has a reset source register, which is responsible for recording 6 reset flag bits: undervoltage reset, power-on reset, external reset, watchdog reset, software reset and UART receiving space character reset (mainly used to enter ISP monitoring one of the ways of the program). Even the AT89S51/52 and P89C52X2, which are commonly used by beginners, have added a power-on flag POF in their power control register PCON.

1 How to set the reset flag bit

The traditional 80C51 microcontroller is not designed to record the reset flag bit. This should be said to be a pity. So can this shortcoming be made up for through certain technical means? Here is a kind of inspiration and guidance for the majority of 80C51 microcontroller users.

Realizing the recording of the reset flag definitely requires certain hardware circuit support, and there is no fixed pattern in the design of this circuit. The author used a piece of MAX813L to design a support circuit, as shown in Figure 1, for readers' reference only.

In Figure 1, a 4-input NAND gate G1 and a push button switch SW1 are used. It also occupies the 5 I/O pins P1.0~P1.4 of the 80C51 and an external interrupt source INT0, and Set INT0 as the only high-level interrupt source through the initialization software in advance, the falling edge trigger mode is valid, and the total interrupt enable bit EA is opened. Normally, since each input terminal of G1 is maintained at a high level, its output terminal also remains at a high level. A massive capacitor C1 is used in the circuit as a device to store energy and plays the role of a backup battery. Due to the existence of diode D1, during the main power outage, C1 only supplies power to the microcontroller, and the 80C51 should be allowed to enter the shutdown state (PD mode) with the lowest energy consumption at this time.

Based on the circuit in Figure 1 and the necessary user software, you can save 6 flag bits to record 7 reset flags after being reset by 7 different reset sources, which will be explained below. You can allocate a byte in the bit addressing interval of RAM in advance, such as the 20H unit, to record 6 reset flag bits, as listed in Table 1.

Assume that the register is named SRFR (System Reset Flag Register), the byte address is 20H, and only 6 bits are used among the 8 bits. Bit5~bit0 record manual reset, undervoltage reset, watchdog reset, illegal address reset, and software reset respectively. Hardware reset and software reset.

① MRST: Manual reset. When the reset button SW1 is pressed, an INT0 interrupt is triggered; the status of the input pin P1.4 is detected in the interrupt service routine. If P1.4=0, MRST is set to record that a manual reset operation has occurred. Then perform an active reset operation by outputting a low level from the output pin P1.0 to the input pin MR of the MAX813L. After a delay of the MAX813L, a high-level reset signal is sent from the output terminal RESET to the 80C51, causing it to proceed. A hardware reset operation.

② LVR: Under voltage reset. When the upstream power supply voltage begins to drop and drops below the PFI detection threshold of MAX813L, the output PFO sends a low level, triggering an INT0 interrupt; the status of the input pin P1.3 is detected in the interrupt service routine. If P1.3=0, set LVR and record that an undervoltage reset operation has occurred; then perform an active reset operation (the method is the same as above), or put the microcontroller into shutdown state in order to save energy consumption and retain data. and waiting for the restoration of main power.

③ WDR: Watchdog reset. When a watchdog overflow occurs, the output terminal WDO of MAX813L sends a low level, triggering an INT0 interrupt; the status of the input pin P1.2 is detected in the interrupt service routine. If P1.2=0, set WDR and record that a watchdog reset operation has occurred; then perform an active reset operation (the method is the same as above). The dog feeding operation utilizes an I/O pin P1.1.

④ IAR: Illegal address reset. When an illegal address occurs, the output terminal PSEN of 80C51 sends a low-level instantaneous pulse, which also triggers an INT0 interrupt; the status of the input pins P1.4~P1.2 is detected in the interrupt service routine. If P1.4~P1.2=111, set IAR, indicating that an illegal address reset operation has occurred; then perform an active reset operation (the method is the same as above).

⑤ SHR: Software and hardware reset. When a software trap capture event or a software watchdog overflow event occurs, SHR can be set directly to represent a software and hardware reset operation; then an active reset operation is performed (the method is the same as above). If T0 is used as software WDT, the INT0 and T0 interrupt sources should be set to high-level interrupts at the same time.

⑥ SWR: Software reset. When a software trap capture event or a software watchdog overflow event occurs, SWR can also be set directly, indicating that a software reset operation has occurred; then call the software reset program SWRST. The software reset program is written as follows:

⑦ POR: Power on reset. Although a POR flag is not directly set in the user-defined system reset flag register (SRFR), if the above six flags are detected to be 0 at the same time, it indicates that a power-on reset was performed previously. The reason is that after experimental verification (the microcontroller model used in the experiment is SST89C58), every time it is powered on for the first time, the contents of the 80C51 internal RAM interval (00H~7FH) including the 20H unit of RAM are automatically cleared; Each time the RST pin is reset (or software resets), its contents remain unchanged. Each SFR is restored to its original value (also called reset value) whether it is a power-on reset or the RST pin reset, as listed in Table 2.

For those newer microcontrollers (such as AT89S51/52, AT89S8252, AT89C53, AT89C55WD, AT89C51RC and P89C51X2/52X2/54X2/58X2) that only add a reset flag (recorded as POF in the technical manual), it happens to be no longer The POR flag set here is needed.

For microcontroller application systems that are not equipped with a backup power supply, you can also consider using E2PROM to dump the reset flag just before the power is turned off, so that it will not disappear completely after the power is turned off. In this case, you can either choose a circuit solution with an external E2PROM data memory (such as 8-pin serial 24C01, 93C46 or 25C040, etc.), or you can choose a microcontroller model with an internal E2PROM data memory, such as AT89S8252, etc. In this way, the moment before the power is turned off, the E2PROM programming operation can be completed by using a small amount of residual energy on the power supply filter capacitor C2.

2 Application method of reset flag bit

The general method of writing initialization program paragraphs is very simple, but it is only suitable for those microcontroller projects with low requirements and simple functions. This type of project (such as some microcontroller applications such as small household appliances) has almost no strong "process" or "non-interruptibility". It will not bring any problems to the reset operation that may occur at any time and the user program to be re-run from the beginning. too great an impact or damaging consequences.

For microcontroller projects with strong "process" or "non-interruptibility" requirements, once an accidental reset operation occurs and the user program is re-run, it will have a huge negative impact or destructive consequences. For example, a bread machine controlled by a single-chip microcomputer will go through mixing, heating and other processes during the process of processing bread; if an accidental reset occurs during the process and the program is re-executed, it will become a waste product or be burned. If a computer-controlled surgical robot is accidentally reset and reworked during an operation, it will bring unimaginable serious consequences. If a computer-controlled missile is accidentally reset during its flight after being launched at the target, and the program is re-executed from the beginning, unpredictable results will occur.

To sum up, if the reset operation of the microcontroller is unavoidable due to unexpected interference during the working process, then where or under what background the program will start running after the reset can be artificially arranged. Therefore, the application method of the reset flag bit is essentially the method of writing the reset handler. The processing flow of the reset handler is shown in Figure 2.

Similar to the idea of ​​writing a UART serial communication interrupt service program, after entering the interrupt program, you must first detect the interrupt flag bit to see whether it is a receiving interrupt (RI=1) or a sending interrupt (SI=1), and then enter different program branches. Provide targeted services. As can be seen from Figure 2, when executing the user program starting from the reset vector 0000H, the reset flag register should first be detected to determine whether it is the initial power-on of the power supply or a reset caused by other reset sources or the program counter PC is cleared.

① If it is the initial power-on of the power supply, initialize it to the original state. This case is the simplest.

② If it is caused by software reset, software and hardware reset, illegal address reset, or manual forced reset caused by program runaway, the data should be restored or parameters should be corrected as much as possible according to the specific situation, so as to not affect or minimize the normal operation of the program ( The specific algorithms for recovering and correcting data will not be discussed in depth here).

③ If it is an undervoltage reset, try to restart program execution from the interrupted program breakpoint. The specific implementation methods and steps can be: before reset - after the microcontroller enters its service program in response to the PFO interrupt request, save the current value of the stack pointer SP to the designated RAM unit, and push the microcontroller into a shutdown state; after reset - wait for the power to be restored Finally, MAX813L is powered and sends a high-level signal from the RESET terminal to wake up the microcontroller in the shutdown state. If the wake-up microcontroller detects an undervoltage reset again, it will first restore the previous SP value, and then use a RET (or RETI) instruction to pop up the program breakpoint before shutdown to the PC, so that it can continue to execute the previous task.