Siemens EDA and TSMC work together to optimize the chip design process

Siemens Digital Industrial Software recently announced that it will deepen its cooperation with TSMC to carry out a series of new certifications and collaborations. A number of Siemens EDA tools and solutions have passed TSMC's new process technology certification.

“TSMC works with design ecosystem partners, including Siemens, to provide customers with proven design solutions that take advantage of the powerful performance and power efficiency of TSMC’s advanced processes, helping customers achieve continued technological innovation,” said Dan Kochpatcharin, director of TSMC’s Design Infrastructure Management Division.

Siemens Calibre passes TSMC N2 process certification

Calibre® nmPlatform tools for integrated circuit (IC) verification sign-off are now certified for TSMC’s N2 process, providing full support for early adopters of TSMC’s N2 process technology. The certified Calibre tools include Calibre® nmDRC software, Calibre® YieldEnhancer™ software, Calibre® PERC™ software, and Calibre® nmLVS software.

TSMC has also certified Siemens' mPower™ simulation software for transistor-level electromigration (EM) and voltage drop (IR) sign-off for the N4P process, and mutual customers can now use mPower's unique EM/IR sign-off solution for their next-generation analog or radio frequency (RF) designs.

In addition, TSMC’s N4P, N3E and N2 Custom Design Reference Flows (CDRFs) are now available with Siemens’ Solido™ Design Environment software for advanced deviation-aware verification at high sigma. Siemens’ Analog FastSPICE platform for circuit verification of nanometer-scale analog, RF, mixed-signal, memory and custom digital circuits has also been successfully certified for TSMC’s N5A, N3E, N3P and N2 processes. As part of TSMC’s CDRFs for N4P, N3E and N2 processes, Analog FastSPICE supports TSMC’s reliability-aware simulation technology to address IC aging and real-time self-heating effects, as well as other reliable capabilities.

Aprisa Place and Route Solution Receives N3 Technology Certification

Siemens' Aprisa™ place-and-route solution has been certified for TSMC's N3E process, further strengthening Siemens' investment commitment in digital implementation. Aprisa is easy to use and can help customers quickly migrate to the N3E node.

Joe Sawicki, Executive Vice President of IC-EDA at Siemens Digital Industries Software, said: "TSMC's pace of innovation is amazing. We are pleased to establish a long-term partnership with TSMC to continuously optimize EDA solutions for TSMC's new processes so that our mutual customers can benefit from it and meet their rapidly changing market and business needs."

TSMC certifies Siemens 3D IC solutions

Several Siemens 3D IC solutions have also made substantial progress towards TSMC 3DFabric™ technology certification. TSMC has certified Siemens Calibre® 3DSTACK software to the 3Dblox 2.0 standard, including physical analysis and circuit verification. This certification includes support for DRC and LVS checks between chiplets, meeting TSMC 3DFabric technology requirements.

In addition, TSMC has certified a range of Tessent™ 3D IC solutions, including Tessent hierarchical DFT, Tessent Multi-die with enhanced TAP (test access port - compliant with IEEE 1838 standard), native FPP (Flexible parallel port) support using stream scan network (SSN) and IEEE 1687 IJTAG network technology. The two parties have also invested in building a 3D IC test ecosystem in accordance with TSMC's 3Dblox standards, including known good die (KGD) loopback testing and physical-aware chip-to-chip fault detection and diagnosis using BMAP and PMAP standards.