Lam Research's Striker ICEFill dielectric filling technology meets new challenges of 3D NAND

Gap filling in high aspect ratio complex architectures has always been a major challenge for 3D NAND, DRAM, and logic chip manufacturers. Aaron Fellis, vice president and general manager of dielectric atomic layer deposition (ALD) products at Lam Research, explains how the Striker ® ​​FE enhanced ALD platform will advance the technology roadmap with its high performance.

Deposition technology is a key element in advancing memory device advancements, but with the advent of 3D NAND stacks, the limitations of existing fill methods have begun to become apparent.

The Striker®FE enhanced atomic layer deposition (ALD) platform launched by Lam Research last year can solve semiconductor manufacturing challenges in the fields of 3D NAND and DRAM. The platform uses an advanced dielectric filling technology called "ICEFill" and can be used for 3D NAND and DRAM architectures and logic devices at advanced nodes. Aaron Fellis, vice president of Lam Research and general manager of dielectric ALD products, pointed out that the demand for filling-related technologies has always existed, but the original methods can no longer meet new needs, especially as 3D NAND stacks are getting taller and taller. He said: "In addition to the very high number of stacked layers, in order to integrate different steps, etching is also required to meet different feature requirements. In the end, we need to re-fill with dielectric materials, the most common of which is silicon oxide."

Fellis pointed out that traditional filling methods that have been used in the semiconductor manufacturing industry, such as chemical vapor deposition, diffusion/furnace and spin coating processes, always have a trade-off between quality, shrinkage and fill rate, and therefore cannot meet the production needs of 3D NAND. "These technologies tend to shrink and cause deformation of the actual structure of the construction and design."

Silicon oxide is still the material of choice for gap filling due to its stability, ability to withstand a wide range of temperatures, and good electrical properties, but its deposition technology has changed. Take Lam Research's Striker ICEFill as an example. This solution uses Lam Research's unique surface modification technology to achieve highly selective bottom-up seamless filling while maintaining the inherent film quality of atomic layer deposition (ALD).

“Standard ALD technology can significantly improve the quality of the film after deposition, which solves the shrinkage problem,” Fellis said.

The Striker® FE enhanced ALD platform with ICEFill advanced dielectric gap-fill technology can be used to fill 3D NAND and DRAM architectures.

In Fellis' view, even if good internal mechanical integrity can be achieved through high-density materials, standard ALD may still cause gaps in some devices, and its ductility may be a problem. ICEFill, which uses bottom-up filling, can achieve very high-quality internal film formation without shrinkage. "Its ductility is very high." He said that this means that it can be used to meet the filling needs of any step, including for improving mechanical strength and electrical properties. "In a specific gap inside the manufactured device, the filling material has uniform properties."

Deposition technology for memory devices has its own roadmap, and the various memory technology advances that drive its development also determine the "shelf life" of existing technologies. Fellis said, "Technology will move higher and smaller." Anticipating the challenges of increasing 3D NAND stacks, Lam Research has already begun to improve its Striker products. He said, "As customers develop according to their own roadmaps, we see their need to improve film performance. Stacking remains a driving force for innovation."

Risto Puhakka, president of VLSI Research, a U.S. semiconductor industry research company, said that as a leader in ALD technology, Lam Research's technology needs reflect the general needs of the storage industry, which is to meet the high storage needs of applications such as artificial intelligence by increasing storage density, but at the same time avoiding cost increases. As the stack height of storage devices such as 3D NAND continues to increase, higher requirements are also placed on filling technology. Puhakka said: "There are more and more manufacturing challenges related to stacking, and chip manufacturers are also worried about excessive costs." In this case, continuing to use very familiar materials (such as silicon oxide) can help better predict costs.