Application of FM3164 in automatic fire alarm system

FM3164 is a new generation of non-volatile ferroelectric memory launched by RAMTRON. It uses I2C bus and is a powerful chip that integrates multiple functions such as serial memory, real-time clock, watchdog, reset circuit, low voltage detection, etc. If FM3164 is used in the alarm host of the automatic fire alarm system, it can solve the problem of fast storage of alarm information and accurate system time, and also solve the problem of failure and processor crash due to interference.

1 Basic Structure and Internal Principle of FM3164
FM3164 uses ferroelectric crystal material. This special material enables ferroelectric memory to have the characteristics of both random access memory (RAM) and non-volatile storage. FM3164 combines non-volatile FRAM with real-time clock (RTC), processor monitor, non-volatile event counter, programmable and lockable 64-bit ID number and universal comparator. Using advanced 0.35μm manufacturing process, these functions are embedded in a 14-pin SOIC package through a universal I2C interface, thus replacing multiple components on the system board. The read/write and other control functions of the memory are realized through the industrial standard I2C bus. Its internal principle is shown in Figure 1.

A0, A1 are device address selection signals (the bus can connect up to 4 I2C devices); SCL and SDA are the communication interfaces with the CPU, where SDA is a bidirectional data port; PFI is the comparator input, and the output result is sent to the CAL/PFO pin, and it is also the clock correction signal output. When the power supply voltage is lower than 2.5 V, the clock power supply is switched to the backup battery. CNT1, CNT2 are the inputs of two external event counters.

2 FM3164 Functions
There are 25 special function registers SFRs in FM3164. The CPU controls these registers through the I2C bus to implement various functions. The internal function diagram of FM3164 is shown in Figure 2.

2.1 Memory Operation
The FM3164 series products provide different memory capacities, including 4 Kb, 16 Kb, 64 Kb and 256 Kb. The series products are software compatible, and all versions use consistent two-byte addresses to operate the memory. The memory is manufactured using ferroelectric technology, and can be read and written at the clock speed of a two-wire bus. The read and write are in bytes, and the write operation has no delay and has passed an unlimited number of read and write times. It has advantages that other similar serial memories cannot match.

2.2 Processor Detection Function
FM3164 provides two basic functions, early power failure detection and watchdog function to prevent software deadlock. When the power supply drops below the pre-programmed action point VTP, the RST pin is pulled low, which will remain at a low level until the power supply voltage is too low to maintain circuit operation. When the power supply voltage rises above VTP, the RST pin will continue to remain at a low level for about 100 ms to provide sufficient reset time at a reliable voltage level. When 1OO ms is up, the RST pin will restore the weak pull-up state to reset the system. The watchdog counter can also generate a valid reset signal. The watchdog counter is a free-running programmable counter. It is programmed to a period of 100 ms to 3 s in 100 ms steps through a 5-bit non-volatile register. It has two control bits: watchdog enable WDE and watchdog reset control bit WR. The reset signal is valid only when the watchdog is enabled and the counter times out.
2.3 Clock Operation
The real-time clock (RTC) can be backed up by a battery or capacitor. It provides a software calibration function to provide higher accuracy. The real-time clock includes a crystal oscillator, a clock divider, and a register system for user access. It divides the 32.768 Hz time base signal to provide a resolution of 1 s. The static register provides the user with read and write access to the time. The registers include seconds, minutes, hours, weeks, months, and years. The time register is synchronized with the time core through the R and W bits located in 00H. When the R bit is changed from 0 to 1, the time information is transferred from the core to the holding register for the user to read. The R bit is used to read the time. Setting bit W to 1 will freeze the user register, and clearing it to 0 will cause the value in the user register to be loaded into the time core. The W bit is used to set a new time value. The user must ensure that no illegal values ​​are written to the register. The time value can be continuously updated except during the period when the register is frozen.
2.4 Clock Calibration
When the CAL bit in register 00H is set to 1, the clock enters calibration mode. When entering calibration mode, the CAL/PFO output pin is used for calibration function, and the comparator output is temporarily invalid. The clock calibration operation is performed by correcting the counter data through the crystal offset. In CAL mode, the CAL/PFO pin outputs a 512 Hz square wave. Any regular frequency error that deviates from 512 Hz is converted into a clock error. The user converts this error into PPM format and writes the appropriate correction value into the calibration register. The factors related to clock calibration are listed in Figure 3. Positive PPM errors require negative adjustments to reduce pulses; negative PPM errors require positive adjustments to increase pulses. Positive PPM adjustments require setting the CALS bit to 1, and negative PPM adjustments set the CLAS bit to 0. After calibration, the highest accuracy of the clock at the calibration temperature can reach ±2.17 PPM or ±0.09 minutes per month. The calibration settings are stored in FRAM, so they will not be lost even if the backup power fails. The setting value is located in the CA L. register 01H. 4-0, this value can only be written when the CAL bit is set to 1. In order to exit the calibration mode, the user must set the CAL bit to 0, at which time the CAL/PFO pin resumes the comparison output function.

2.5 Event Counter FM3164 has two 16-bit event counters (or one 32-bit event counter) with backup battery, located in registers 0DH~1OH. CIN1 and CIN2 are the event counter signal input terminals. The counting adopts programmable edge trigger mode. If the C1P position of the 0CH address is 1, CIN1 adopts the upper Rising edge trigger, otherwise falling edge trigger is used. C2P controls CIN2. 3 Working process of FM3164 FM3164 as a slave integrates two components with different functions. One is the memory. When accessing, bits 7 to 4 of the slave address must be set to 1010B. To access the real-time clock/processor, etc., bits 7 to 4 of the slave address must be set to 1101B. The device uses a two-wire I2C interface. The two-wire protocol consists of two pins, SDA and SCL. There are four states: start, stop, data transmission and response. The basic communication format is shown in Figure 4. FM3164 strictly follows the timing and data format of the I2C bus. The access operation process can be described in The steps are as follows: Start → Slave address → Response → Target address → Response → (Start → Slave Address → Response) → Data (single or multiple bytes) → Response → Stop (the slave address contains the read Write command, the steps in brackets are specific to the Current Address Read and Continuous Address Read commands). 4 Application of FM3164 in automatic fire alarm controller In high-rise buildings, public places, underground facilities, modern factory areas in modern large and medium-sized cities In the construction and management of important buildings and facilities, the national fire protection regulations require the installation of independent Fire alarm system. It is essential that the fire alarm system operates quickly, safely, reliably and accurately. The clock device and information storage are the most critical parts of the alarm host. Using the latest process technology, the ferroelectric non-volatile memory FM3164 can achieve The rapid storage function of alarm information and the accurate system time guarantee also solve the problem Problems with power supply voltage failure and processor freeze due to interference.

4.1 Hardware Principle
The fire alarm controller uses STC89C54RD+ microcontroller. FM3164 is used as the information storage unit to communicate with the microcontroller through SCL and SDA. Since the microcontroller does not have an I2C bus interface, any two I/O ports are used for simulation. The real-time clock automatically switches to the backup power supply after Vcc loses power. The power supply is connected to the comparator input port PFI through a resistor divider. When VCC is lower than 3.7 V, the comparator output PFO changes from a high level to a low level. When PFO is connected to the external interrupt port of the microcontroller, the CPU generates an interrupt to complete the power-off protection function. The working principle diagram of FM3164 is shown in Figure 5.

4.2 Programming

5 Conclusion
This paper introduces the functional principle and usage of FM3164 series chip ferroelectric memory in detail and comprehensively, and gives the general hardware circuit and some control programs. FM3164 series chips replace ordinary serial memory and clock chips with their powerful functions and performance, and will be increasingly used in embedded control systems.