How to choose a system interface for digital temperature sensors

How to choose a system interface for digital temperature sensors

The ability to facilitate accurate thermal management coupled with the calibration-free nature will ensure that digital temperature sensors continue to be popular. To meet the high reliability and system redundancy requirements where multiple masters need to coexist, and for applications that require the easy addition of new temperature sensors, the I2C bus or SMBus will continue to maintain its position as the primary choice for temperature sensor system interfaces.

Figure 1: Simplified digital temperature sensor block diagram.

Thermistors, thermocouples, analog silicon temperature sensors, and nickel/platinum resistance temperature detectors (RTDs) require calibration to achieve the required temperature accuracy. Digital temperature sensors, as mixed-signal devices, do not require calibration. They have integrated digital logic, an operating temperature range of -55°C to 50°C, and use a proportional absolute temperature (PTAT) circuit to measure local/remote temperature by detecting changes in the base-emitter voltage (VBE) of a diode. It has simple integrated hardware to save temperature values ​​and program temperature set points, device operating modes, sleep modes, and fast/slow conversion rates. Data is communicated via the inter-IC bus (I2C bus), system management bus (SMBus), or serial peripheral interface (SPI). In fact, each device is adjusted during production, and the temperature detection accuracy is within ±0.5°C or better, with high cost performance and reliability. These advantages make digital temperature sensors popular in almost any conceivable application, including PCs, communications equipment, handheld devices, and industrial control equipment.

Specifically, the main components of a digital temperature sensor include a dual current source, a delta-sigma A/D converter, digital logic, and a serial interface (such as I2C bus, SMBus, or SPI) leading to a digital device (such as a microprocessor or microcontroller). There are two types of digital temperature sensors: local or remote temperature sensors, both of which use some method to force two proportional currents through an NPN or PNP transistor connected in the form of a diode, and both are used to measure the resulting VBE change. The voltage is sampled and converted into a digital format using a delta-sigma A/D converter. The forced current is generally in a ratio of about 10:1. By forcing the proportional current and measuring the difference between the two VBEs, the first-order effect of IS on the diode, a process-related parameter, can be eliminated.

Figure 2: SPI typical read/write cycle. (Click to enlarge the image)

Each temperature sensor is trimmed during production to match the ideal parameters of the diode to be used. The characteristics of the remote diode are taken from the 2N3904/6. The remote temperature sensor almost always integrates a local temperature sensor, since the local temperature sensor is just a simple NPN or PNP structure on the silicon substrate. Therefore, the remote sensor almost always acts like two sensors. The local temperature sensor integrates a thermal diode in the same package. For the local sensor, the thermal time constant (i.e., the time required to reach 63.2% of the final temperature) is several minutes, depending on the package and the local diode located on the IC substrate. Heavy bus loads or fast switching can cause the device to self-heat and affect temperature accuracy.

The time required for temperature data to become available is called the conversion rate. This rate is determined by the device's internal oscillator and the A/D resolution and is typically less than 100Hz or longer than 10ms. The faster the conversion rate, the faster the temperature data can be retrieved, but the more power the temperature sensor consumes. Conversion rates are typically lower due to self-heating effects. Figure 1 shows a simplified block diagram of a remote temperature sensor and/or local temperature sensor.

Advantages of I2C-bus or SMBus Temperature Sensors

The most popular digital temperature sensors are those with a serial bus interface. The choice of temperature sensor bus depends largely on what interfaces are available on the selected microprocessor or controller. The choice of controller depends on how much experience the engineer has with it. For system data that requires frequent data streaming, SPI is the first choice because it has a fast clock rate, which can range from a few megahertz to tens of megahertz. However, for system management activities such as reading temperature sensor readings and querying the status of multiple slave devices, or when multiple master devices need to coexist on the same system bus (which is often required for system redundancy), or for low-power applications, I2C or SMBus will be the preferred interface. The following sections will introduce each serial bus and its advantages and disadvantages.

1. SPI

SPI is a four-wire serial bus interface with a master/slave structure. The four wires are serial clock (SCLK), master-slave input (MOSI), master-slave output (MISO) and slave select (SS) signals. The master device is the clock provider and can initiate a read or write operation from a slave device. At this time, the master device will talk to a slave device. When there are multiple slave devices on the bus, to initiate a transmission, the master device will pull the slave device select line low, and then start data transmission or reception through the MOSI and MISO lines respectively.

SPI clock speed is very fast, ranging from a few megahertz to tens of megahertz, and there is no system overhead. The disadvantage of SPI in system management is the lack of flow control mechanism. Neither the master device nor the slave device confirms the message, and the master device cannot know whether the slave device is busy. Therefore, a clever software mechanism must be designed to handle the confirmation problem. At the same time, SPI does not have a multi-master device protocol, and very complex software and external logic must be used to implement a multi-master device architecture. Each slave device requires a separate slave select signal. The total number of signals is ultimately n+3, where n is the number of slave devices on the bus. Therefore, the number of wires will increase in proportion to the number of slave devices added. Similarly, it is not convenient to add new slave devices to the SPI bus. For each additional slave device added, a new slave device select line or decoding logic is required. Figure 2 shows a typical SPI read/write cycle. A read/write bit follows the address or command byte. Data is written to the slave device through the MOSI signal and read from the slave device through the MISO signal. Figure 3 shows the system block diagram of the I2C bus/SMBus and SPI.

2. I2C bus

I2C is a two-wire serial bus interface that operates in master/slave mode. The two-wire communication signals are open-drain SCL and SDA serial clock and serial data. The master device is the clock source. Data transfer is bidirectional, and its direction depends on the state of the read/write bit. Each slave device has a unique 7 or 10-bit address. The master device initiates a transfer with a start bit and terminates a transfer with a stop bit. The start bit is followed by a unique slave device address, followed by the read/write bit.

I2C bus speeds range from 0Hz to 3.4MHz. It's not as fast as SPI, but it's ideal for system management devices like temperature sensors. I2C has system overhead, which includes start/stop bits, acknowledge bits, and slave address bits, but it has flow control mechanisms because of this. The master always sends an acknowledge bit when it has finished receiving data from a slave, unless it is ready to terminate the transfer. The slave always sends an acknowledge bit when it receives a command or data from the master. When a slave is not ready, it can hold or stretch the clock until it is ready to respond again.

Figure 3: (a) I2C-bus/SMBus system interface; (b) SPI system interface.

Figure 4: Typical read/write operations of the I2C-bus/SMBus.

I2C allows multiple masters to operate on the same bus. Multiple masters can easily synchronize their clocks so all transmit using the same clock. Multiple masters can detect which master is using the bus through data arbitration, thus avoiding data corruption. Since the I2C bus has only two wires, new slaves can simply be connected to the bus without additional logic. Figure 4 shows a typical I2C bus read/write operation.

3. SMBus

SMBus is a two-wire serial bus, and the first version of the specification was commercialized in 1996. It is largely based on the I2C bus specification. Like I2C, SMBus does not require additional pins. The bus was created mainly to add new features, but it only works at 100kHz and is specifically for smart battery management applications. It works in master/slave mode: the master device provides the clock, provides a start bit when it initiates a transmission, and provides a stop bit when it terminates a transmission; the slave device has a unique 7 or 10-bit slave address.

There are some differences in timing characteristics between SMBus and I2C bus. First, SMBus requires a certain data hold time, while I2C bus extends the data hold time internally. SMBus has a timeout function, so when SCL is too low for more than 35 ms, the slave device will reset the ongoing communication. In contrast, I2C uses hardware reset. SMBus has an alert response address (ARA), so when a slave device generates an interrupt, it does not clear the interrupt immediately, but remains until it receives an ARA containing its address sent by the master device. SMBus only operates from 10kHz to a maximum of 100kHz. The minimum operating frequency of 10kHz is determined by the SMBus timeout function.