MEMS: Package-level design considerations beyond the chip

The packaging form of MEMS devices is a key factor in bringing MEMS-based system solutions to the market. Research has found that in typical MEMS-based products today, packaging costs account for almost 20% to 40% of all material and assembly costs. Due to production factors, the testing cost after packaging is higher than the device-level testing cost, which makes the packaging selection and design of MEMS products more important.

MEMS device design teams must consider and pay great attention to packaging strategies and how to make compromises before starting each design and throughout the entire design process. Many MEMS product suppliers regard product packaging as the main product difference and competitive advantage in market competition.

Package Selection Rules
Designing a package for a MEMS device is often more complex than designing a package for an integrated circuit because engineers often have to follow additional design constraints and meet the need to operate in harsh environmental conditions. The device should be able to clearly distinguish between the media being measured in such harsh environments. These media may be as mild as dry air or as harsh as blood, radiator radiation, etc. Other media include the environment in which the measurement is made, such as shock, vibration, temperature changes, moisture, and EMI/RFI.

First, the packaging of the MEMS device must be able to interact with the environment. For example, the pressure input of the pressure sensor, the fluid inlet of the blood processing device, etc. The packaging of the MEMS device must also meet some other mechanical and thermal margin requirements. As the output of the MEMS device may be a change in mechanical motor or pressure, the mechanical parasitic phenomenon of the package may interact and interfere with the function of the device.

For example, in piezoresistive sensors, package stress affects the sensor output. When different materials are mixed in the package, they have different coefficients of expansion and contraction, so the stress caused by these changes is added to the sensor's pressure value. In optical MEMS devices, package stress due to shock, vibration, or thermal expansion can cause the alignment between the optical device and the optical fiber to shift. In high-precision accelerometers and gyroscopes, the package needs to be isolated from the MEMS chip to optimize performance (see Figure 1).

Figure 1 Schematic diagram of conventional wafer-level packaging (WLP) structure

Depending on the type of MEMS device being manufactured, electronic performance considerations can determine the strategy for the type of packaging selected. For example, capacitive sensing MEMS devices generate very small charges that can be detected by electronics, requiring special attention to signal integrity issues in the circuit and package during design.

Typically, most MEMS-based system solutions provide corresponding circuit compensation, control and signal processing units for the MEMS chip. Therefore, a MEMS chip and a custom ASIC chip can be integrated in the same package. Similarly, the circuit can also be a single chip and a single package with integrated MEMS devices (see Figure 2).

Figure 2 Single-chip constant temperature accelerometer

MEMS devices are sometimes also packaged at the wafer level, and the MEMS is sealed with a protective cap to isolate it from the external environment or provide mobile protection for the MEMS device before the next packaging. This technology is often used in the packaging of inertial chips, such as gyroscopes and accelerometers.

This packaging step is implemented during the MEMS tape-out process and needs to be operated in a clean environment according to the wafer processing process. In comparison, most of the packaging of integrated circuits is completed at the chip level after the wafer is cut, and there is no particularly high requirement for the environmental cleanliness of the packaging process.

MEMS chip designers prefer to use very low-cost standard packaging, so plastic packaging or packaging compatible with integrated circuits can take advantage of the cost advantages of the integrated circuit industry. Using standard packaging also reduces design and test time, and the cost of the packaging itself is also very low. A general rule is that if the MEMS device can be mounted on a PCB, it is likely to use a standard integrated circuit package (see Figure 3).

Figure 3 The die of the micro optomechanical system (MOEMS) switch is connected by four optical fibers and connecting wires and packaged in an industry-standard Covar metal package.

However, the vast majority of today’s MEMS device packages are custom-made and optimized for specific applications, so standard integrated circuit packages cannot withstand the harsh conditions described above that can affect the dielectric.

The challenge of MEMS device packaging is that there are two fields with large applications in the future: medical electronics and automotive electronics. In these two types of applications, the measured media are very harsh for MEMS devices. In the field of automotive electronics, it is necessary to measure the pressure or chemical composition of internal combustion engine oil, fuel, coolant thermal radiation, exhaust emissions, etc. Both fields require devices to have high reliability and extreme ruggedness. Therefore, long life (especially for medical implantable devices), small size (see Figure 4), and biomaterial compatibility (see Figure 5) are the biggest problems faced when choosing packaging design, materials, and interfaces.

Figure 4 Wireless, battery-free implantable cardiac blood pressure waveform monitoring device

Traditional ME Figure 5 High-density cochlear implant system uses a quartz silicon para glue packaging process, which can provide good biocompatibility, flexibility and long-term stability

MEMS device packaging
Early MEMS device packaging used SOC (System-on-Chip) technology to assemble one or more MEMS devices using CMOS technology, including analog and digital processes. MEMS products can also use SIP (System-in-Package) technology to integrate two or more chips in the package discussed above. Wire-bonding is used to connect the chips in the package, including the MEMS chip. Today, this technology is being replaced by flip-chip packaging technology in the field of integrated circuit production (see Figure 6).

Figure 6. Stacked connection between telecom optical switching devices (bottom die) and CMOS control circuits (top die).

In the past, engineers often left package design to the final stage after key sensor and circuit design was completed. However, this design process has changed under the pressure of product launch and fierce competition, forcing engineers to change their design methods. Otherwise, the disadvantages of product packaging will miss the best market window. In addition, due to the lack of design tools, when stress or other influencing factors are not properly evaluated, the design fails.

New development tools
Currently, new technologies for package design are close to the level of MEMS device manufacturing. Through-silicon via (TSV) etching technology can achieve a wafer etching depth of up to more than 100 μm. Therefore, MEMS fabs can use this same level of technology as MEMS manufacturing to manufacture packages.

The use of through silicon vias (TSVs) has enabled another technology, that is, multi-chip stacking technology. This technology stacks the dies of multiple chips in a package and connects them together through silicon vias. Chip stacking makes the chip package smaller, but it makes the package more complicated. Heat must be transferred between chips that are stacked very closely, resulting in heat dissipation problems; in addition, the stability of the mechanical structure must also be carefully simulated to ensure good performance and reliability. Traditional integrated circuit packaging factories are now also beginning to provide special MEMS device packaging, and equipment suppliers are also investing in the development of new packaging and testing equipment. Therefore, there are many packaging options for MEMS devices. MEMS devices that integrate multiple sensors and provide higher value-added systems with corresponding software are gradually moving towards multi-chip packaging solutions. Chip stacking can be produced one piece at a time or by wafer-level packaging.

Future Development Trends
An important new direction in packaging technology is to use flexible substrates to package multiple rigid devices together. Multiple sensors can be combined with electronic units and power modules. By folding, the size of the packaged system can be made very small. This technology is very attractive for wearable human body sensors.

When packaging suppliers in the IC field focus on other added value, standardization of packaging is possible, but it will take a long time. It will also take a lot of time for who and where to draft the standard. This is because the competition between MEMS and semiconductor fabs and traditional packaging houses will enable the development of the latest and highest performance packaging technology, and also make more traditional semiconductor fabs start to provide services for the MEMS industry.