Design of learning remote controller based on NiosⅡ

Abstract: Using the Altera FPGA series Cyclone EP1Cl2Q240C8 device as the carrier, the embedded soft-core NiosⅡ processor platform is constructed through SoPC technology. The Verilog HDL hardware description language is used to design the equal-precision carrier frequency measurement IP core, infrared signal demodulation IP core, infrared coded pulse width measurement IP core and infrared transmission modulation logic circuit to achieve accurate carrier measurement, infrared signal demodulation, pulse width measurement and modulation functions, and the peripheral hardware circuit and software design scheme are given. The experiment shows that the remote control solves the bottleneck that the microcontroller cannot measure the carrier frequency due to the low clock frequency, realizes the key coding learning of any ordinary remote control, and truly completes the learning function of the learning remote control.
Keywords: soft-core processor; equal precision; remote control; FPGA/SoPC

O Introduction
Infrared remote controls are widely used in home appliances, but the remote controls of various products use different frequencies or coding methods, which makes these remote controls incompatible with each other, which brings many inconveniences to people's lives. In response to this problem, many manufacturers have designed and produced an infrared signal remote control device called a universal remote control. Most of these remote controls use the copying of the remote control infrared waveform to achieve the learning purpose. The method is simple and easy to implement. By learning and storing the infrared codes emitted by different ordinary remote controls, multiple household appliances can be controlled remotely, thereby reducing the number of remote controls in the home. However, this type of remote control is usually implemented using a dedicated ASIC or single-chip microcomputer, and can only receive infrared signal codes of a single carrier, resulting in many limitations in actual use, mainly reflected in: if the carrier frequency of the household appliance remote control device is different, the universal remote control will be powerless; different household appliances use a single remote control interface, which is prone to confusion and misoperation; due to storage space limitations, the number of remote controls that can be supported is limited.
Therefore, this paper designs an infrared learning remote control based on NiosⅡ, which concentrates carrier frequency measurement, infrared signal demodulation, pulse width measurement, and modulation and transmission IP cores on FPGA devices, greatly simplifies peripheral hardware circuits, and utilizes the 32-bit processor of Nios soft-core CPU, which can accurately measure the pulse width and improve the processing speed. It can accurately measure the carrier frequency and restore the original infrared signal to the greatest extent without distortion, solving the bottleneck that the microcontroller cannot measure the carrier frequency due to low clock frequency, and realizes the learning of various infrared remote controls, truly completing the learning function of the learning remote control.

1 Overall design scheme
The system is mainly composed of NiosⅡ processor, Avalon bus, EPCS controller, SDRAM controller, FLASH controller, input and output I/O port, equal precision measurement carrier frequency IP core, infrared signal demodulation IP core, infrared coded pulse width measurement IP core, infrared transmission modulation logic circuit, interrupt controller, etc., as shown in Figure 1. After power-on, the system calls the system configuration information through EPCS and the system is initialized. When the "Learn" key is pressed, a request signal for measuring infrared carrier frequency is generated through the I/O port interrupt, and the "Learn" indicator light is on. When an external remote control infrared signal is detected, the processor calls the equal-precision carrier frequency measurement IP core through the Avalon bus to start measuring the frequency. The "Learn" indicator light goes out, indicating that the carrier frequency learning is successful. Next, the "Home Appliance" button can be used to store the carrier frequency in the infrared encoding FLASH carrier frequency storage area of ​​the home appliance. The corresponding "Home Appliance" indicator light is on, indicating that the home appliance infrared remote control signal learning or sending stage can be entered. When learning, just align the home appliance remote control sending window with the learning remote control receiving window to send the infrared remote control signal. At this time, the Nios soft-core processor will call the infrared signal demodulation IP core and the infrared encoding pulse width measurement IP core through the Avalon bus to complete the demodulation of the infrared signal and the high and low level time measurement of a frame of complete encoding pulse width (all data processed in this process is stored in SDRAM). When the "Learn" light is on again, it means that the signal has been confirmed. By pressing any function key of the learning remote control, the signal can be sent to the designated FLASH storage area of ​​the home appliance button; when sending, first select the "home appliance" selection key (that is, select the carrier frequency), and then press the "function key", the NiosⅡ processor will automatically call the FLASH storage data, modulate it to the carrier through the infrared transmission logic circuit, and complete the infrared signal restoration.


2 Hardware Circuit Design
2.1 Main Control Circuit Design
The main control circuit is mainly based on the Altera FPGA series Cyclone EPlCl2Q240C8 device, and uses the SoPC technology to build an embedded soft-core NiosⅡ processor platform. The Verilog HDL hardware description language is used to design the precision measurement carrier frequency IP core, infrared signal demodulation IP core, infrared coded pulse width measurement IP core and infrared transmission modulation logic circuit to achieve accurate measurement of the carrier, infrared signal demodulation, pulse width measurement and modulation functions. The reset circuit uses a dedicated watchdog chip CATl025 to avoid circuit dead loops. At the same time, the system can be restarted by manually pressing the reset button. The clock uses an external clock mode with a frequency of 50 MHz. The main control circuit diagram is shown in Figure 2.


2.2 Peripheral hardware circuit design
2.2.1 Button and indication circuit
In order to simplify the software program, combined with the advantages of FPGA's multiple I/O ports, this design adopts an independent button mode. When the button is pressed, the corresponding I/O port of the FPGA will detect a low level; when the button is released, the corresponding I/O port of the FPGA will detect a high level. For the indication circuit, light-emitting diodes of different colors are used to indicate different states or control different household appliances. When one of the indicator lights flashes, it means that the corresponding household appliance remote control is being learned or the corresponding household appliance remote control signal is being sent.
2.2.2 Infrared receiving and sending circuit
The infrared receiving circuit consists of an infrared diode, transistor 9014 and a resistor. When no infrared signal is detected, the infrared receiving diode has a large resistance (approximately open circuit), and transistor 9014 is in a hand-off state. At this time, the IR_RECEIVE end detects a high level; when an infrared signal is detected, the infrared receiving diode has a small resistance. At this time, the emitter of transistor 9014 is forward biased, the collector is reverse biased, and the transistor is in an amplification state. The infrared signal is amplified by the common emitter circuit and input to the FPGA I/O port 18 pin, and then handed over to the Nios soft core for processing. When sending, the infrared signal modulated by the infrared transmission modulation logic circuit is output from the FPGA I/O port 16 pin. The infrared signal is amplified again by the transistor 9014 and then output from the collector, driving the infrared transmitting tube to radiate the infrared modulation signal, thereby realizing the regeneration of the infrared remote control signal. The infrared transmission and receiving circuit is shown in Figure 3.


2.2.3 Storage circuit
The storage circuit is mainly composed of AM29LV320DT (4 MB 16-bit parallel bus) FLASH chip and K4S641632H (64 MB 16-bit parallel bus) SDRAM chip. The SDRAM chip plays the role of buffering data, saving the data information exchanged between the processor and the outside, and the data is lost after power failure or reset. FLASH flash memory is used for program storage of SoPC system and data storage that needs to be saved after power failure. However, the read operation of FLASH is slower than that of SDRAM, and the write speed is even slower (relative to SDRAM). After the NiosⅡ system is started, the NiosⅡ Boot program copies the program stored in FLA-SH to SDRAM and then runs it.
3 Software Design
When the system is powered on, it enters the waiting state. When it detects that the learning button is pressed, the system enters the learning state. During the learning process, the Nios processor writes the frequency measurement control word and calls the frequency measurement IP core through the A-valon bus to measure the carrier frequency. After the measurement is completed, it is detected that the demodulation control word and the pulse width measurement control word are written, that is, the infrared signal demodulation begins and the pulse width of the demodulated signal is measured. After the measurement is completed, the processor will write the data to the corresponding storage area to complete the learning process. As shown in Figure 4. When restoring the signal, the processor writes the transmission modulation control word and controls the infrared transmission modulation logic circuit through the Avalon bus. After the transmission is completed, it returns to the waiting state and waits for the next transmission. As shown in Figure 5.


4 System Function Simulation
In order to verify the principle, hardware system and software system of the learning remote control, the 21K8 Philips TV remote control, RMFDLC7461 NEC TV remote control and RM-687C Sony TV remote control were selected as experimental objects. The "power" function key of these three remote controls was pressed to send infrared remote control signals. The corresponding carrier frequencies were 36 kHz, 38 kHz and 40k-Hz respectively. The infrared receiving diode of the learning remote control received the infrared signal, amplified it through the transistor 9014, and sent it to the 18th pin of the I/O port of the FPGA. The integrated simulator in the QuartusⅡ software can be used to simulate the function of the learning remote control. First, establish a project, and after all the compilations are passed, simulate its function and timing, as shown in Figures 6 to 8. By comparing the waveforms of the filtered carrier infrared signal High_En and the signal IR_code output by the infrared transmission modulation logic circuit in Figures 6 to 8, it can be seen that the high and low levels of reception and transmission are maintained for the same time, the data is consistent, and the level is also consistent.


The simulation results show that the "power" function key code of the 21K8 Philips TV remote control, RM-FDLC7461 NEC TV remote control and RM-687C Sony TV remote control is the same as the code sent by the learning remote control, indicating that the learning is successful. It also shows that the remote control can accurately measure infrared remote control signals of different carriers, solving the bottleneck that the single-chip microcomputer cannot measure the carrier frequency due to low clock frequency.

5 Conclusion
The learning remote control uses SoPC technology to build an embedded soft-core NiosⅡ processor platform, and uses Verilog HDL language to design precision carrier frequency measurement IP core, infrared signal demodulation IP core, infrared coded pulse width measurement IP core and infrared transmission modulation logic circuit, and concentrates the precise measurement of the carrier, infrared signal demodulation, pulse width measurement and modulation on the Ahera FPGA series Cyclone-EPICl2Q240C8 device, greatly simplifying the peripheral hardware circuit. Experiments show that the remote control solves the bottleneck that the microcontroller cannot measure the carrier frequency due to the low clock frequency, realizes the key code learning of any ordinary remote control, and truly completes the learning function of the learning remote control.