Design of music water lamp control system based on FPGA

FPGA is the abbreviation of field programmable gate array. It has both the high integration and versatility of gate array devices and the flexibility of programmable logic devices. The control of music water lights through FPGA is essentially to correspond different scales with square wave signals of specific frequencies, drive the buzzer to emit music with square wave signals, and then control the flashing of water lights according to different scales. Compared with the performance of music with the help of microprocessors, it is more intuitive to complete the music performance circuit in a pure hardware way. EDA tools and hardware description languages ​​have played a powerful role and provided design possibilities.

1 Overall design plan
Music water lights are mainly decorations for public places. The playing of music and the rhythmic flashing of water lights, while achieving a perfect combination of hearing and vision, have become an indispensable condition for its formation. To understand how to produce music of different scales, we must first understand the characteristics of musical sounds. Musical sounds are actually signals with fixed frequencies. In the composition of music, the frequency and duration of musical sounds are its constituent elements. The frequency of the scale can be obtained by dividing the high-frequency clock. The pitch of the audio can be displayed by the flashing of an external LED light, so that the combination of music and running lights can give people a strong sense of rhythm. With the help of LCD to display the pitch and length of the scale, people who do not know music theory can intuitively see the scale corresponding to different tones.
The overall design requirements are as follows:
(1) Frequency division is mainly achieved through a controllable divider. The higher the frequency of the clock used, the larger the frequency division coefficient, and the more accurate the frequency of the scale after frequency division. However, since the frequency division coefficient is large, the number of counting units used increases, thereby consuming more hardware logic units, so a more moderate clock frequency of 12MHz can be adopted.
(2) The signal after frequency division is a clock signal with an extremely narrow pulse width. The pulse width must be adjusted and the duty cycle must be increased to effectively drive the buzzer. When the pulse width is adjusted, the signal will be divided into two again. Therefore, when calculating, the frequency division coefficient under a specific clock signal is calculated at twice the frequency of the musical scale, so as to obtain the correct scale frequency after adjusting the duty cycle.
(3) The frequency of the music changes a lot, and the corresponding frequency division coefficient also changes constantly. Therefore, it is necessary to store the frequency division coefficient of the music being played in ROM in advance for easy reading. If the frequency division coefficient is directly stored in the register as a storage code, it will inevitably occupy a larger capacity. Therefore, the index value is selected as the storage code here to reduce the capacity.
(4) The number of LED lights on the development platform is limited. You can choose to flash regularly, such as lighting up, gradually brightening, and gradually extinguishing from left to right; you can also use the number of flashes to indicate the frequency. This design uses the second method.
Figure 1 is a block diagram of the principle of the music water light control system. It can be seen that the system includes three modules: music playback control module, water light control module and LCD display module. The music playback control module is divided into a music score playback control module, a scale frequency division module and a scale frequency generation module.

2 Module design
2.1 Music playing control module
The main function of the music playing control module is to output the index values ​​corresponding to the music scores stored in ROM in advance in sequence under the drive of a certain clock signal, control the frequency division, and generate the corresponding frequency division signal frequency, so as to control the sound of the buzzer.
2.1.1 Design of scale frequency divider
In order to display the current scale while playing the music, the number of LED bits is used to indicate the high and low pitch of the current scale. The scale frequency division coefficient in the program is selected by the index value, that is, the index value of the current scale transmitted by the music score storage circuit during the music playing process.
2.1.2 Design of scale frequency
generation After obtaining the frequency division coefficient corresponding to the above scale index value, the scale frequency generation circuit divides the frequency through a controllable counter. The counter in the frequency division circuit counts down by 1, and the carry signal of the counter is the frequency division signal. Because the pulse width of this signal is extremely small, it is necessary to adjust the duty cycle so that the external drive circuit can provide enough power to drive the buzzer, and it is specifically achieved by dividing the frequency division signal by two.
2.1.3 Design of music score playback control module
Music playback is driven by an external 8 Hz clock, and the internal counter counts and generates addresses, which are sent to the ROM unit as the memory address, and the corresponding address data - the scale index value is output.
In this design, the emission of each note is controlled by another 8 Hz clock signal. The quarter note in the music score is driven by 4 clock signals. At each clock, the corresponding scale output is stored in the ROM in the form of an index value. The address line of the ROM in this article is 10 bits, and the data line width is 4 bits. The data stored in the ROM is the index value of each syllable. According to the needs of music score conversion, 16 index values ​​can meet the needs of music score writing, so a 4-bit data line is set. The width of the address line mainly depends on the length of the music. About 520 4-bit units are used in this design. In order to leave a certain margin, the data line width is defined as 10 bits, that is, 1 024 4-bit units. The index values ​​corresponding to different scales are shown in Table 1.

According to the score, the index values ​​corresponding to the scale are stored in ROM continuously. For example, the middle note 3 of a quarter note on the score has an index value of 10 in the ROM memory, and it is placed 4 times in a row, while an eighth note 5, which is a half-beat 5, has the corresponding index value 5 stored in the ROM twice in a row. When playing, the index value is continuously output from the ROM under the drive of the playback clock (8 Hz). The index value is sent to the scale frequency division module, converted into the count initial value output, and then sent to the scale frequency division generation module as the count initial value to generate the scale frequency output to drive the buzzer. In this way, the music to be played can be sounded on the buzzer. After determining the score, that is, the storage content of the ROM, you can customize the ROM and specify its initialization file as a .mif file.
2.2 Design of the running light control module
Since this design is based on the DE2.70 development board, the corresponding scale output is used to display the flashing effect of the running light using LED lights. Set the number of lights to be lit according to the pitch of the tone "hight". When "hight" is low, the bass signal is played, and when it is high, the mid-range signal is played. If you want to use the high-pitched signal, you can change the length of "hight" to 2 bits. Select the first 7 lights of oLEDR[6．．0] on the board to correspond to the bass signal, and oLEDR[13．．7] to correspond to the mid-range signal. In this design, in order to see obvious changes in the running lights, the bass display lights are all lit when the mid-range audio is emitted.
2.3 LCD display module design
First, you need to build a SOPC system in SOPC Builder, add the NioslI processor, 4 kB on-chip RAM, LCD module, 4-bit input port in turn as required, and assign the reset vector address and exception vector address to the processor.
The LCD display module is used to realize the real-time display of music scores and audio intensity, and can display 16×2 characters. Its software flow is shown in Figure 2.

LCD initialization includes LCD function settings, display switch settings and mode settings. LCD positioning to the first row and first column is done by writing positioning instructions to the LCD, and the display position is determined to the first row and first column. Writing the characters "jian pu" to the first row is done by writing data instructions to display the characters jian pu: and the real-time changing music score on the first row of the LCD screen. Low, medium and high notes are represented by L, M and H respectively and displayed with the corresponding scale values. LCD display line break is achieved by positioning instructions. Displaying the audio intensity to the second row uses the number of symbols ">" to represent the pitch, one for bass 1, two for bass 2, and so on.
When controlling the display of the LCD module, write control commands and write data commands are used. These commands are written for specific hardware circuits. h header file. The header file of the LCD module is as follows

This is written to correspond to the specific hardware circuit. In the hardware description language of the LCD module, the address allocation of the LCD module RW and RS is as follows:

The RS signal is the command and data line. A high level indicates that data is currently exchanged on the data line, and a low level indicates that commands are currently exchanged on the data line. The LCD module responds correctly based on this signal. RW is a level signal. A high level indicates that a read operation is performed on the LCD module, and a low level indicates that data or commands are written to the LCD module. In this way, the offset of each read and write operation corresponding to the base address can be determined.

3 Top-level design and verification
The top-level design of the system is to instantiate each bottom-level functional module, call it at the top level, and make the correct connection to form the final system. The hardware circuit of the entire system is shown in Figure 3.

At this point, a hardware music water lamp circuit is completed. Provide two clock signals (12 MHz and 8 Hz) externally, and then connect the music output end to a buzzer or speaker with a driver, and you can enjoy the added music. If there is only one clock signal input in the hardware design, you can design a frequency divider inside the FPGA to divide it to 8 Hz before using it, and you can also change it on this basis. In addition, you can store multiple songs in a ROM and select and play songs by pressing buttons. Finally, download the configuration files of the software and hardware to the DE2.70 development board to verify the function of the system. The display result is shown in Figure 4.

4 Conclusion This paper
introduces the design of a music water light control system based on FPGA. The VHDL hardware description language is used to describe the entire music playback control module and the synchronous water light flashing module, and an LCD display module is built in the SOPC system, which provides convenience for the flexible configuration of the hardware system and the flexible design of the software system, and is also conducive to the optimization and upgrade of the system. The system uses FPGA as the control core, and has the characteristics of simplicity, stability, easy modification and transplantation, and good reusability.