Research on communication issues between PC and CPLD

    Abstract: According to the characteristics of CPLD serial communication between PC as host computer and slave computer, this article introduces the writing of VB program for the host computer; details the use of AHDL language to write the program for the slave computer in the environment of EDA software MAXPLUSII. This design has the advantages of high baud rate and accurate transmission, and is downloaded to the chip and verified through hardware testing.

    Keywords: serial communication programmable logic device VB language

introduction

It is very convenient to use CPLD (Complex Programmable Logic Device) to design, even simulate, verify, and use ISP (In-System Programmable) for hardware debugging. Therefore, the development cycle is very short, and the I/O port can be set at will, so CPLD is used exclusively for design. Chips are the general trend. VB is an object-oriented high-level language. It is very convenient and simple to use this communication control to write communication programs for the host computer. In view of the characteristics of CPLD and PC communication, this article has written programs for the upper computer and lower computer respectively to carry out relatively high-speed serial communication.

1 Introduction to the communication characteristics of the host computer and slave computer

According to the serial communication protocol, sending serial data generally consists of: 1 start bit, n data bits, and 1 or more stop bits. In this way, sending the start bit indicates the start of transmission. Both the transmitting and receiving parties set the same number of transmission bits until n data bits are sent, and then the stop bit is sent. The level standards of the upper computer and the lower computer are different. They are converted through the RS-232 level standard, and the RS-232 level conversion chip can be connected between the two. The transmission between the upper computer and the lower computer is asynchronous transmission, so a reference pulse is required to represent the transmission speed, that is, the baud rate. Both communicating parties obtain the same communication speed bps, which refers to the number of bits transmitted per second. In current instrument and industrial situations, 9 600 bps is generally the most common speed, and the serial speed provided by personal computers PC can now be 115 200 bps (or even 921 600 bps). Because the software of commonly used single-chip microcomputer MCU is a process language, as a slave computer, it cannot provide such a high baud rate, and even a lower baud rate may produce errors. Therefore, when the transmission distance is short and the equipment can provide it, it is okay to use the highest transmission speed. The software of CPLD is a non-procedural language, which means that all the actions defined by its logical segments are performed simultaneously rather than serially, so it is completely possible to provide such a high-speed slave UART (Universal Asynchronous Receiver Transmitter).

2 PC VB program

The host computer software is written using VB6. Microsoft's VISUAL BASIC language has an extremely friendly interface and is well received by programmers. Its visualization features have been put into good use. The MSCOMM control is very convenient for writing software and hides the lowest level part. As long as you know the parameters you need, you can write the host computer software sequentially. Now introduce the parameters of this control:

CommPort - specifies the serial port;

PortOpen——whether the serial port is open;

InPut - input register;

Output - output register;

InBufferSize——Input buffer size;

OutBufferSize——Output buffer size;

InputLen - read the string length or number of bytes from the serial port at a time;

Settings - device baud rate, transmission data bits, parity bits, stop bits;

InputMode - The input data type (text or binary).

The upper computer program must cooperate with the lower computer. The main issues to consider are the baud rate and input and output data types. For the situation of outputting data from the lower computer to the upper computer, the following processing can be done (and vice versa is similar):

Settings 115200, n, 8, 1 (baud rate 115 200bps, parity bit default, 8 data bits, 1 stop bit)

For the host computer, the following conversion is required to obtain the input data in the form of binary numbers:

Dim data() As Byte

Private Sub Timer1_Timer()

data()=MSComm1.Input

For i=LBound(data)To UBound(data)

Text2.Text=data(i)

Next

End Sub

When the serial port is open, use the timer to regularly obtain data from the slave computer and display it in the window. Control the reading time by setting the interval parameter of the VB timer control. It can be seen that it is very convenient to use VB to write programs on the host computer. This is a mature modular language. As long as the parameters are given, programming can be realized quickly.

3. Preparation of communication program for lower computer

There are many commonly used macro units in MAXPLUSII, such as counters, four arithmetic operations, various logic gates, and even ROM, RAM, etc.; and the specific parameters in these macro units can be set by the user. This is the IP mentioned above. nuclear form. Due to the trend of structured design in CPLD digital design, different levels of IP (intellectual Property) cores will appear. Each IP core can be reused, which greatly improves design capabilities and efficiency and avoids duplication of work. The following design is the IP core of the slave computer. It is a macro unit whose baud rate, start bit, and stop bit can be set.

MAXPLUSII's AHDL (Altera Hardware Description Language) is a modular high-level language developed by Altera that is fully integrated into MAXPLUSII. It is particularly suitable for describing complex combinational logic, group operations, state machines and truth tables. This article uses AHDL to directly generate IP cores.

The ultimate goal of the design is to generate the Symbol shown in Figure 1. Its parameters can be set by the user (upper right corner of Figure 1), choosing to send (receive) the highest or lowest bit of serial data first, data width, stop bit, etc.

The program list is as follows:

CASE Ss IS --state machine

WHEN idle =>

IF Load THEN

Ss=wait;

ELSE

Ss=idle;

END IF;

WHEN wait =>

IF BAD THEN

Ss=send;

ELSE

Ss=wait;

END IF;

WHEN send =>

IF count[]!=0 THEN

Ss=wait;

ELSE

Ss=idle;

END IF;

WHEN OTHERS =>

Ss=idle;

END CASE;

TxD=InShift[WIDTH+1]; --TXD string out

IF Ss!=idle THEN --Control BUSY

Busy=VCC;

END IF;

CASE Ss IS

WHEN idle =>

count[]=WIDTH+STOP_BITS; --number of bits to be transmitted

WHEN send =>

count[ ]=count[ ]-1;

WHEN OTHERS =>

Count[]=count[];

END CASE;

CASE Ss IS --Control input register

WHEN idle =>

IF MSB_FIRST= =“YES”GENERATE

DTMP[]=D[];

ELSE GENERATE

FOR each_bit IN 0 TO WIDTH-1 GENERATE

DTMP[WINDTH-1-each_bit]=D[each_bit];

END GENERATE;

END GENERATE;

InShift[]=(1,0,DTMP[]);

WHEN send =>

InSift[WIDTH+1..1]=InShift[WIDTH..0];

InShift[0]=VCC;

WHEN OTHERS=>

InShift[]=InShift[];

END CASE;

Figure 3 shows the simulation waveform. The system clock CLK is 6MHz. After dividing by 50, the clock BAUD with a period of 868ns is obtained, that is, the baud rate is 115 200 bps. Set to transmit sequentially from high bit to low bit: 1 start bit, low level; 8 data bits, 1 stop bit, high level. Figure 3 shows the situation of transmitting decimal numbers 20, 21, 22, and 23 (ie, binary numbers 00010100 00010101 00010110 00010111) respectively. The LOAD signal is always valid. It can be seen that there are a total of 10 bits to transmit a data, 1 start bit, 8 data bits, and 1 stop bit. According to the baud rate of 115 200 bps, the time required to transmit one data is 86.8 μs . This number fully reflects the advantages of CPLD, which is more than 10 times faster than MCU serial transmission. If the host computer UART allows, this speed can be increased to nearly 100 times the MCU serial transmission, that is, the baud rate is 921 600 bps.

After the design is completed and simulated, the generated pof file is downloaded to the CPLD board EPM7128LC84-6 using the ISP (online programming) method through programming electromagnetic programming, and the external RS-232 level conversion chip HIN232CP is connected. After level conversion, the CPLD communicates with the PC interface, and the host computer uses VB to write the program. Tests have proven that communication is normal at high speeds.