Embedded video acquisition and transmission system based on DM365

introduction

Texas Instruments (TI) has launched a new TMS320DM365 digital media processor based on Da Vinci technology. The DM365 is highly integrated with many components, including H.264, MPEG-4, MPEG-2, MJPEG and VC1 codecs that meet production requirements, an integrated image signal processing (ISP) solution that can meet intelligent video processing functions, and a series of on-board peripherals, which can enable developers to reduce system costs by 25%. This article focuses on the DM365 digital media processor and specifically introduces the design of an embedded video acquisition and transmission system based on the DM365.

1 Overall structure of embedded video acquisition and transmission system

This system uses the current advanced WiFi wireless communication technology and combines the H.264 video compression algorithm to build a wireless video monitoring system. The system works as follows: the video acquisition node converts the collected video and audio data into a unified IP data packet format after front-end compression and other processing, and sends it to the AP via WiFi wireless mode. The AP is connected to the industrial optical fiber Ethernet to achieve seamless connection between wireless and existing communication networks, forming a perceptual mine multimedia digital network. This wireless video monitoring system can be used in mine disaster relief emergency communication systems, as well as in coal mine safety production management such as underground belts and hydraulic supports, which can greatly improve the energy efficiency of mine safety monitoring systems and save mine production costs. The wireless video monitoring system diagram is shown in Figure 1.

Figure 1 System architecture

2 System Hardware Implementation

2.1 System Core Architecture

The main function of this video acquisition and transmission system is to enable real-time and smooth multimedia communication in underground coal mines.

The general guiding principle of system design is: low power consumption and low cost while maintaining real-time multimedia communication quality. The node hardware mainly includes: video acquisition front end, video processing module, wireless transmission module and power module as well as some peripheral circuits.

The principle block diagram of the system is shown in Figure 2.

Figure 2 Camera block diagram

2.2 Video Processing Module

The video processing module uses TI's Da Vinci high-performance multimedia processor TMS320DM365 to complete device management, audio and video compression processing and transmission communication, realizes wired network interface through external Ethernet physical layer chip, and realizes wireless network communication using WIFI chip GS1010, supporting TCP/IP network protocol.

TMS320DM365 is a new digital media processor launched by Texas Instruments (TI) based on DaVinciTM technology for portable high-definition video applications. This processor continues the processor architecture of DM355 in the DaVinci family, integrating an ARM926EJ-S core, an H.264 high-definition codec coprocessor HDVICP and an MPEG-4/JPEG high-definition codec coprocessor MJCP, which can support H.264/MPEG-4 high-definition video codec.

DM365 integrates the video processing subsystem VPSS (Video Processing Subsystem), H.264 coprocessor (HDVICP), ARM926EJS processor and various related peripherals, and can use a variety of peripherals, such as high-speed USB OTG 2.0. Through the combination of various expansions, DM365 can be applied to cameras, network digital cameras and other fields.

2.2.1 ARM processor

The ARM group system uses the ARM926EJ-S core CPU with the ARMv5TEJ (32/16bit) instruction set. It is a 32bit RSIC processor with pipelined pipeline and an operating frequency of 216/270/300MHz. The ARM CPU performs common system control tasks such as system initialization, configuration, power management, user interface and user commands. ARM is used as the main control and executes these functions because it has a large program storage space and fast task switching capabilities, so it is more suitable for complex, multi-tasking and general task control.

The ARM subsystem (ARMSS) includes the ARM926EJ-S RISC processor, ARM internal memory, embedded trace module and embedded trace buffer module (ETM/ETB) and system control peripherals. The ARM926EJ-S RISC processor also includes coprocessor 15, memory management unit (MMU), 16KB instruction set, 8KB data cache, write cache and Java accelerator. The ARM internal memory includes a 32KB internal RAM (32-bit wide access) and 16KB internal ROM. The system controls the ARM interrupt controller, PLL controller, power management module and system module.

2.2.2 Video Processing Subsystem (VPSS)

TMSDM365 has a video processing subsystem (Video Processing Subsystem-VPSS) that supports input interfaces (Video Processing Front End-VPFE) for external imaging peripherals such as image sensors, video decoders, etc.

It also supports output interfaces (Video Processing Back End-VPBE) for display devices such as analog SDTV/HDTV displays, digital LCD displays, etc.

In addition to these peripherals, there is a common buffer memory and DMA control setup to ensure efficient use of DDR2/mDDR bandwidth. The shared buffer logic/memory is the only module that integrates seamlessly into the image/video processing subsystem within an image VPSS. It acts as the primary source and sink to all VPFE and VPBE modules to obtain or pass data from DDR2/mDDR. To efficiently utilize external DDR2/mDDR bandwidth, it interfaces to the shared buffer logic/memory through a high-bandwidth bus (64-bit wide) DMA system. The shared buffer logic/memory interfaces to all VPFE and VPBE modules through a 128-bit wide bus.

The VPFE module includes the Image Sensor Interface (ISIF), Image Pipeline (IPIPE), Image Pipeline Interface (IPIPEIF) and Hardware 3A Statistics Generator (H3A). These modules provide a powerful and flexible front-end interface for the device.

VPBE modules include On Screen Display (OSD) and Video Encoding (VENC) modules. These modules support devices with powerful and flexible backend display interfaces.

2.3 Video Capture Front-end

The core component of the video acquisition front end is the camera, which is generally composed of a lens, an image sensor, a digital signal processing chip, etc. The optical image generated by the lens is projected onto the surface of the image sensor, and then converted into an electrical signal. After A/D (analog-to-digital conversion), it becomes a digital image signal, which is then sent to the digital signal processing chip (DSP) for processing, and finally transmitted to the computer through an interface for processing, and the image can be seen through the display.

CCD and CMOS sensors are two commonly used image sensors. Both use photodiodes for photoelectric conversion to convert light images into electronic data. Due to the different working principles of CCD and CMOS image sensors, each has its own advantages and disadvantages in performance.

Table 1 Comparison of advantages and disadvantages between CCD and CMOS

In short, CMOS sensors have some disadvantages in terms of image quality compared to CCD sensors, as shown in the table above, but CMOS has certain advantages in other characteristics. Considering that the system has high requirements for power consumption, and the image quality of CMOS cameras can still meet most monitoring needs, this system uses CMOS cameras.

2.4 Wireless Transmitter Module

Wifi technology is used to realize wireless transmission of video. Wifi is the abbreviation of Wireless Fidelity. It is a technology and specification for wireless LAN data transmission, which is also the wireless communication standard IEEE 802.11 defined by IEEE. Considering the interface characteristics of the DM365 development board, the system node adopts the GS1010 chip of the Wifi solution. This wireless SOC chip adopts dual ARM7 cores, including real-time clock (RTC), power control unit, flash memory (Flash) and SRAM, and integrates Wifi radio frequency (RF) front end and microcontroller. It has the functions of positioning tracking and monitoring materials. Such chip structure greatly reduces the complexity of node design and saves node cost. The power module provides energy for the sensor module and the processor module. The output of the gas conditioning circuit only needs to be connected to the ADC interface of GS1010, which basically completes the hardware design of the Wifi-based gas monitoring node. GS1010 is manufactured using a 0.18-micron process and is packaged in a 10mm*10mm QFN package. The hardware design saves on components, simplifies the design circuit wiring density, and improves system reliability. The operating current is 2mA at 1.8V and 5mA at 3.6V. It can maintain a node operating life of up to 5 to 10 years on a single AA battery.

In addition, it also supports IEEE802.11b/g standards, and provides 802.11i (WPA2-PSK), AES encoding, and EAPFAST to ensure data and information security.

3 Conclusion

The system has low power consumption and low price, and realizes real-time monitoring of complex and harsh working environments. It can be applied to unmanned working faces in coal mines to timely understand various changes in the working face environment and ensure the safety of on-site workers.