Research on a propulsion algorithm based on digital pre-distortion platform

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introduction

With market pressures high-power radio designs appear to be more cost-effective than ever. The most important component is transmitter efficiency. A quick look at the transfer function of a power amplifier (PA) reveals a fundamental trade-off between linearity and power efficiency. PA transistors are most power efficient when operating in saturation, but linearity is poor. Nonlinearity can cause the spectrum to spread outside the signal bandwidth, interfering with adjacent channels and degrading adjacent channel leakage ratio (ACLR) performance. Within the signal bandwidth, amplifier nonlinearity can also cause increased distortion, degrading the receiver’s error vector magnitude (EVM) performance and increasing the bit error rate (BER).

To meet the linearity and spectrum requirements of the air interface, the input signal level to the power amplifier is reduced so that it operates in the linear portion of the transfer curve, but this results in poor power efficiency. Although this approach is simple, it increases system cost; to achieve the required power output, a larger and more expensive PA must be used. In a typical 3G mobile base transceiver station (BTS), the transmit efficiency is less than 10%, which means that more than 90% of the DC power is converted into heat and is not used.

1 Digital Pre-Distortion Technology

A more cost-effective solution to this dilemma is to use a cleverly designed DSP. Digital predistortion (DPD) is a technique that predistorts the transmit signal to meet spectral requirements while effectively linearizing the PA transistors operating in the high-efficiency saturation region. DPD requires an observation receiver where a coupled version of the PA output is downconverted by a high-bandwidth ADC. The digital version of the transmit waveform is compared to the receive waveform, and an adaptive algorithm calculates or updates a series of parameters to preload the next transmit waveform. When the adaptive algorithm converges, the transmitter output is linearized even when the PA is operating in a highly nonlinear portion of the transfer function. DPD can increase transmitter efficiency from less than 10% to more than 35%, depending on the algorithm and power amplifier topology used.

Radio system design that includes complex closed-loop algorithms such as DPD cannot be done in isolation. Modeling the analog behavior of the signal chain and the electrical and thermal memory effects of the PA is also not a trivial task. The number of distortion mechanisms increases rapidly with the order of nonlinearity, which means that the input drive level of the PA can significantly change the distortion behavior. A complete closed-loop estimation platform is invaluable in optimizing the DPD algorithm for a given PA.

Analog Devices has developed a 3G/4G compatible transmit radio platform that enables designers of wireless infrastructure equipment to estimate closed-loop performance results using power amplifiers and digital predistortion techniques. This mixed-signal digital predistortion platform (MSDPD), shown in Figure 1, combines high-performance linear and mixed-signal components into an advanced transmitter and DPD observation receiver.

Mixed Signal Digital Predistortion (MSDPD) Development Board

Figure 1: Mixed-Signal Digital Predistortion (MSDPD) Development Board

2 FPGA Advantages of DPD Platform

Many DPD users today use solutions based on either fixed-function ASICs or FPGAs. FPGAs are programmable, giving users the flexibility to optimize their solutions and adapt to future developments in data converter and power transistor technology. Fixed-function ASICs do not allow designers to easily change algorithms or support different versions of standards. The benefits of programmable devices are faster time to market, flexible and cost-effective adaptation to new and evolving standards without the need to redesign like ASICs.

With the advancement of FPGA technology, the entire radio modem can now be implemented using a single FPGA device, supporting multiple standards and multiple antennas, thus eliminating many signal processing and connection ICs, reducing circuit board space and BOM costs. In addition, this level of integration brings the industry one step closer to software-defined radio (SDR), helping equipment manufacturers to quickly respond to the needs of network providers.

The MSDPD development platform is the only solution on the market that provides FPGA functionality to designers of wireless infrastructure equipment. The MSDPD board seamlessly interfaces with a variety of FPGA development kits: Altera Stratix IV through the HSMC interface, and Xilinx Virtex 6 through the FMC interface. Directly interfacing with the FPGA provides designers with an instant and convenient framework to quickly evaluate third-party DPD algorithms, or to design and optimize their own algorithms in a closed-loop environment by simply reprogramming the FPGA.

3 Architecture of the DPD Platform

The MSDPD board's transmit chain and observation receive paths both provide best-in-class performance. The radio is a wideband design and can be configured at assembly time to support RF bands from 800MHz to 2.7GHz. Currently a 125MHz transmit bandwidth is supported. Depending on the DPD method used, the corrected transmit bandwidth is between 20MHz and 40MHz.

The inputs to the MSDPD board include baseband digital data from the FPGA, a reference clock, observed RF output, and power. Its outputs include the RF preamplified output at the desired RF carrier center frequency and an IF sampled version of the transmitter output. The board is designed to work with an external PA and RF coupling network. The transmitter and observation receiver signal chains used on the MSDPD are shown in Figure 2.

MSDPD emission and observation path diagram

Figure 2: MSDPD emission and observation path block diagram

4 ZIF/CIF transmitter

The MSDPD board uses a 16-bit 1.2GSPS dual-channel DAC to sample the baseband I and Q data from the digital processor, then modulates it to the required RF output frequency and amplifies it to produce a peak output power of up to +19dBm, which can be transmitted to the external PA for transmission. The MSDPD board supports both zero intermediate frequency (ZIF) and complex intermediate frequency (CIF) transmission architectures.

The DAC selected is the 1.2GSPS 16-bit dual-channel DAC AD9122, which has the best performance in its class and can meet the MC-GSM Class 1 requirements. The high input LVDS data rate supports the 200MHz input bandwidth of the first-generation MSDPD platform. The on-chip 32-bit NCO (digitally controlled oscillator) of the AD9122 supports the flexible generation of IF frequency with a step size of less than 1Hz, which helps designers meet channel grid requirements. If there is no NCO, it is necessary to use the divider in the RF PLL, which may reduce the spurious performance. Digital gain, phase and offset compensation functions are also integrated on the chip to help reduce LO feedthrough and the unwanted sidebands introduced by the analog orthogonal modulator, thereby minimizing the RF filtering requirements.

The dual DAC is followed by a fifth-order low-pass filter to remove unwanted DAC images or clock-related spurs. The filter cutoff frequency is designed to meet high requirements to maintain a flat frequency response and low group delay variation over the entire transmit bandwidth. After filtering, the ADL5375 quadrature modulator up-converts the analog IF to the final RF. The ADL5375 was chosen because of its wide bandwidth and very low noise floor (-159dBm/Hz). The ADL5375 supports a disable function that can disable the output during the Rx portion of the TDD burst.

The local oscillator (LO) for the transmit path is generated on-chip using the ADF4150 PLL and an external VCO to provide excellent phase noise performance. Another benefit of the complex IF transmit architecture is that the transmit and observation receive paths can share the LO because the observation receiver uses an IF sampling architecture.

The quadrature modulator is followed by the RF amplifier chain. Since the gain of the PA changes with frequency and temperature, some kind of analog gain control is needed to equalize the transmitter. To minimize SNR degradation and achieve the best OIP3 (output third-order intercept point) performance, it is recommended that most of the gain range adjustments be made between amplifier stages. The ADL5541 15dB fixed gain block is followed by a PIN diode attenuator for analog gain control. Fixed gain blocks generally have better linearity and noise performance than VGAs (variable gain amplifiers). The ADL5320 pre-driver broadband amplifier is the last device in the MSDPD board's RF amplifier chain, providing 13dB of additional gain and 42dBm OIP3, with a noise figure (NF) of 4.5dB at 2.1GHz. The cascaded RF amplifier chain provides 22dB of gain, an OP1dB of 24dBm at maximum gain, and an OIP3 of 41dBm.

Passband flatness and group delay variation across the DPD bandwidth are also important transmitter characteristics. The digital algorithm attempts to equalize the frequency response of the upconverter. This directly affects the dynamic range of the transmitter, which is reduced by the amount of ripple or attenuation across the passband. The filter design of the MSDPD board transmit path is optimized, with a passband flatness of less than 1dB and a group delay variation of less than 0.5ns across the bandwidth.

5 IF Sampling Observation Receiver

The MSDPD board has a complete real IF sampling observation receiver built in, which is designed to digitize the coupled output of the PA and provide it to the DSP element. The role of this receiver is to observe the characteristics of the transmit path, so its linearity and noise performance should be better than the monitored object so as not to affect the overall performance. The increase in PA coupled output distortion caused by the observation path cannot be distinguished from the PA distortion, which will inevitably affect the effectiveness of the DPD algorithm. In order to obtain the best DPD performance, the filter should have a relatively flat frequency response and low group delay variation in the target frequency band.

The observation receiver includes a double-balanced passive mixer AD5365/7, which operates in the RF band of 900-2500MHz. This highly linear mixer has an input IP3 of 36dBm and integrates RF and LO baluns and SPDT switches to support selection between two LO sources. The mixer downconverts the RF signal to a typical IF signal of 184 MHz, but this IF frequency can be changed according to application requirements. The mixer is followed by the AD8375 digitally controlled variable gain amplifier (DGA), which provides a gain range of 24 dB to ensure that the full dynamic range of the ADC is maintained. This is followed by an anti-aliasing filter to remove harmonics and broadband noise before the signal is digitized by the AD9230 12-bit, 250MSPS ADC. The four-carrier WCDMA loopback results show a measured performance of 60dB SNRFS and 77dBc spurious-free dynamic range (SFDR) at the ADC output.

6 Closed-loop performance

A typical setup for closed-loop transmitter estimation using the MSDPD board is shown in Figure 3. With the FPGA development kit and the MSDPD board, all that is needed is a power connection, a computer with a USB interface, and a PA stage to get the complete estimation system up and running.

MSDPD setup with FPGA development platform

Figure 3: MSDPD setup with FPGA development platform

Figure 4 shows typical closed-loop DPD performance before and after linearization using the MSDPD board, using a 20MHz bandwidth LTE signal at 2.14GHz. The results are promising, indicating that lower-cost PAs can be used to achieve higher power efficiency and linearity. Spectral performance can typically be improved by at least 25dB, depending on the DPD algorithm.

MSDPD closed-loop performance

Figure 4: MSDPD closed-loop performance

7 Conclusion

Analog Devices’ MSDPD board is a complete tool for wireless companies to study the role of DPD in their systems. With ADI’s mixed-signal digital pre-distortion platform, designers have the flexibility to design, estimate, and optimize DPD algorithms without having to use pre-packaged closed solutions. This complete radio estimation platform not only helps designers of wireless infrastructure equipment estimate DPD, but also opens the door to quickly estimate the role of DPD in other applications that use high-power amplifiers, such as cable broadcast systems, microwave point-to-point links, and wireless repeaters. In theory, it can not only compensate for high-power PAs, but also compensate for the nonlinearity of the transmit chain itself. In the future, more applications will benefit from DPD technology.

Reference address:Research on a propulsion algorithm based on digital pre-distortion platform

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