Synchronous Rectification Technology and Its Application in DC/DC Converters

Abstract: Synchronous rectification technology uses power MOSFET with extremely low on-resistance to replace the rectifier diode, which can greatly reduce the loss of the rectifier, improve the efficiency of the DC/DC converter, and meet the needs of low-voltage and high-current rectification. First, the basic principle of synchronous rectification is introduced, and then the design of synchronous rectification DC/DC power converter is emphasized.

Keywords: synchronous rectification; magnetic reset; clamping circuit; DC/DC converter

1 Overview of Synchronous Rectification Technology

In recent years, with the development of power supply technology, synchronous rectification technology is rapidly being promoted and applied in low-voltage, high-current output DC/DC converters. The loss of DC/DC converters mainly consists of three parts: the loss of power switch tubes, the loss of high-frequency transformers, and the loss of output rectifier tubes. In the case of low voltage and high current output, the conduction voltage drop of the rectifier diode is high, and the loss of the output rectifier tube is particularly prominent. The fast recovery diode (FRD) or ultra-fast recovery diode (SRD) can reach 1.0~1.2V. Even if a low-voltage drop Schottky diode (SBD) is used, a voltage drop of about 0.6V will be generated, which leads to increased rectification loss and reduced power efficiency. For example, laptops currently generally use a power supply voltage of 3.3V or even 1.8V or 1.5V, and the current consumed can reach 20A. At this time, the rectification loss of the ultra-fast recovery diode is close to or even exceeds 50% of the power output power. Even if a Schottky diode is used, the loss on the rectifier tube will reach (18%~40%)PO, accounting for more than 60% of the total power loss. Therefore, the traditional diode rectifier circuit can no longer meet the needs of achieving low voltage, high current switching power supply with high efficiency and small size, and has become a bottleneck restricting the efficiency improvement of DC/DC converters.

Synchronous rectification is a new technology that uses a dedicated power MOSFET with extremely low on-resistance to replace the rectifier diode to reduce rectification loss. It can greatly improve the efficiency of the DC/DC converter and there is no dead zone voltage caused by the Schottky barrier voltage. The power MOSFET is a voltage-controlled device, and its volt-ampere characteristic is linear when it is turned on. When using a power MOSFET as a rectifier, the gate voltage must be synchronized with the phase of the rectified voltage to complete the rectification function, so it is called synchronous rectification.

In order to meet the needs of high-frequency and large-capacity synchronous rectification circuits, some special power MOSFETs have been continuously introduced in recent years. Typical products include the NDS8410 N-channel power MOSFET produced by FAIRCHILD, whose on-state resistance is 0.015Ω. The SI4800 power MOSFET produced by Philips is made using TrenchMOSTM technology. Its on and off states can be controlled by logic levels, and the drain-source on-state resistance is only 0.0155Ω. The IRL3102 (20V/61A), IRL2203S (30V/116A), and IRL3803S (30V/100A) power MOSFETs produced by IR have on-state resistances of 0.013Ω, 0.007Ω, and 0.006Ω, respectively, and the on-state voltage drop when passing a current of 20A is less than 0.3V. These special power MOSFETs have high input impedance and short switching time, and have now become the preferred rectifier devices for designing low-voltage and high-current power converters.

Recently, foreign IC manufacturers have also developed synchronous rectification integrated circuits (SRIC). For example, the IR1176 recently launched by IR is a high-speed CMOS controller specifically designed to drive N-channel power MOSFETs. The IR1176 can operate independently without relying on the primary side topology, and does not require the addition of complex circuits such as active clamps and gate drive compensation. The IR1176 is suitable for synchronous rectifiers in high-current DC/DC converters with output voltages below 5V, which can greatly simplify and improve the design of isolated DC/DC converters in broadband network servers. The IR1176 is equipped with an IRF7822 power MOSFET to improve the efficiency of the converter. When the input voltage is +48V, the output is +1.8V, and 40A, the efficiency of the DC/DC converter can reach 86%, and the efficiency can still reach 85% when the output is 1.5V.

2 Basic Principles of Synchronous Rectification

The basic principle of the single-ended forward, isolated buck synchronous rectifier is shown in Figure 1. V1 and V2 are power MOSFETs. In the positive half cycle of the secondary voltage, V1 is turned on and V2 is turned off, and V1 plays a rectifying role; in the negative half cycle of the secondary voltage, V1 is turned off and V2 is turned on, and V2 plays a freewheeling role. The power loss of the synchronous rectification circuit mainly includes the conduction loss of V1 and V2 and the gate drive loss. When the switching frequency is lower than 1MHz, the conduction loss is dominant; when the switching frequency is higher than 1MHz, the gate drive loss is dominant.

Figure 1 Basic schematic diagram of a single-ended buck synchronous rectifier

2.1 Design of magnetic reset circuit

The disadvantage of the forward DC/DC converter is that the high-frequency transformer must be reset during the power tube cutoff period to prevent the transformer core from saturating. Therefore, it is generally necessary to add a magnetic reset circuit (also called a transformer reset circuit). Figure 2 shows three commonly used magnetic reset circuits for single-ended buck synchronous rectifiers: auxiliary winding reset circuit, R, C, VDZ clamp circuit, and active clamp circuit. The three magnetic reset methods have their own advantages and disadvantages: the auxiliary winding reset method will complicate the transformer structure; the R, C, VDZ clamp method is a passive clamp, and its advantage is that the magnetic reset circuit is simple and can absorb the peak voltage generated by the leakage inductance of the high-frequency transformer, but the clamp circuit itself also consumes magnetic field energy; the active clamp method has the highest efficiency among the above three methods, but it increases the cost of the circuit.

(a) Auxiliary winding reset circuit (b) R, C, VDZ clamp circuit (c) Active clamp circuit

Figure 2 Three common magnetic reset circuits for single-ended buck synchronous rectifiers

Magnetic reset requires the drain voltage to be higher than the input voltage, but it is necessary to avoid the drain voltage of the DPA-Switch exceeding the specified value during the magnetic reset process. For this purpose, an RS and CS network can be connected in parallel at both ends of the secondary rectifier tube, as shown in Figure 3. This circuit can quickly restore the energy of the high-frequency transformer to a safe value after each switching cycle to ensure that UD>UI. When the DPA-Switch is turned off, the magnetic induction current flows out through the secondary winding of the transformer, and the capacitor CS is used to reduce the magnetic induction current to zero. The capacitance of CS must be small enough to decay the magnetic induction current to zero within the shortest off time; but the capacitance of CS cannot be too small to prevent the drain voltage from exceeding the clamping voltage of the voltage regulator tube. The resistance value of the resistor RS should be between 1 and 5Ω. If the resistance value is too small, it will form self-excited oscillation with the internal parasitic inductance. The above magnetic reset circuit is suitable for switching power supplies below 40W.

Figure 3 Magnetic reset circuit with parallel RS and CS networks

2.2 Verification of magnetic reset circuit

When the input voltage is at the minimum or maximum value, the magnetic reset circuit is required to accurately reset the high-frequency transformer within a controllable range. The best way to check the magnetic reset is to observe the drain voltage waveform of the DPA-Switch. Taking the magnetic reset circuit shown in Figure 3 as an example, when the input voltage is 72V, 48V and 36V respectively, the three magnetic reset waveforms observed by the oscilloscope are shown in Figure 4.

(a) UIN = 72V

(b) UIN = 48 V

(c) UIN = 36V

Figure 4 Three types of magnetic reset waveforms

Figure 4 (a) shows the drain voltage waveform when the input voltage is 72V. A 2.2nF reset capacitor is connected in parallel to the output rectifier to meet the needs under full load. The clamping capacitor on the primary winding is 47pF. T in the figure represents the switching period, D is the duty cycle, and tON=DT is the on-time of DPA-Switch. In the tON time period, the positive magnetic flux of the high-frequency transformer increases and the drain voltage reaches the minimum value. In the tRZ time period, the high-frequency transformer is reset, the total energy stored in the high-frequency transformer is close to zero, and the drain voltage reaches the maximum value. In the tRN time period, the negative magnetic flux of the high-frequency transformer increases, and the reset capacitor and the clamping capacitor discharge to the transformer inductor. In the tVO time period, the magnetic flux remains negative, and the voltage of the primary winding of the high-frequency transformer is zero. This is because the drain voltage is equal to the input voltage (both are 72V) but opposite in polarity, which cancels each other out. In the tVO time period, the negative magnetic induction current passes through the secondary winding.

Figure 4 (b) shows the drain voltage waveform when the DC input voltage is 48V. As the input voltage decreases, the duty cycle begins to increase. The situation during the tRZ and tRN time periods is the same as when the input voltage is 72V, but the energy in the high-frequency transformer is close to zero during the tVO time period.

Figure 4 (c) shows the case when the duty cycle is further increased when the input voltage is 36V. Since the drain voltage reaches its peak value during the tRZ stage, the magnetic flux of the high-frequency transformer has been reset to zero. When the DPA-Switch is turned on, its drain voltage is in the negative flux region. Under normal operating conditions, the peak value of the drain voltage should be less than 150V. This drain peak voltage is provided by the leakage inductance and the inductor reset.

2.3 Clamping Circuit

When the power MOSFET changes from on to off, a spike voltage and an induced voltage will be generated on the primary winding of the switching power supply. The spike voltage is formed by the leakage inductance of the high-frequency transformer (i.e., the self-inductance generated by the leakage magnetic field), which can easily damage the MOSFET after being superimposed with the DC high voltage UI and the induced voltage UOR. For this reason, a clamping protection circuit must be added to clamp or absorb the spike voltage. The clamping circuit is divided into two types: passive clamping and active clamping. There are four main designs for passive clamping circuits:

1) A clamping circuit consisting of a transient voltage suppressor (TVS) and a superfast recovery diode (SRD);

2) R, C, SRD clamping circuit composed of RC components and ultrafast recovery diodes;

3) The RC absorption circuit is composed of resistance and capacitance components;

4) The clamping circuit composed of several high-voltage Zener diodes connected in series is specifically used to clamp the drain-source voltage uDS.

Among the above solutions, solution 1) has the best protection effect, which can give full play to the advantages of TVS's extremely fast response speed and ability to withstand transient high-energy pulses. Solution 2) is second. Given that the nominal breakdown voltage value (U1mA) of the varistor (VSR) is highly discrete and its response speed is much slower than that of the TVS, it is generally not used to form a drain clamp protection circuit in a switching power supply.

The circuit of the active clamp DC/DC converter is shown in Figure 5. Because the active device MOSFET (V4) is used as a clamping tube in the circuit, it is called an active clamping circuit. CC is the clamping capacitor, and V3 is the main power switch tube. As shown in Figure 5, when V4 is turned on, V3 is turned off because uGS3=0. When V4 is turned off, uGS3 turns V3 on, which plays a clamping role on the peak voltage generated by the transformer leakage inductance.

Figure 5: Circuit of active clamp DC/DC converter

3 Design of 16.5W Synchronous Rectification DC/DC Power Converter

The following is a forward, isolated 16.5W DC/DC power converter. It uses the DPA-Switch series monolithic switching regulator DPA424R. The DC input voltage range is 36~75V, the output voltage is 3.3V, the output current is 5A, and the output power is 16.5W. The 400kHz synchronous rectification technology is used to greatly reduce the rectifier loss. When the DC input voltage is 48V, the power efficiency η=87%. The converter has complete protection functions, including overvoltage/undervoltage protection, output overload protection, open-loop fault detection, overheating protection, automatic restart function, and can limit peak current and peak voltage to avoid output overshoot.

The circuit of the 16.5W synchronous rectification DC/DC power converter composed of DPA424R is shown in Figure 6. Compared with the power converter composed of discrete components, the circuit design can be greatly simplified. The electromagnetic interference (EMI) filter at the input end composed of C1, L1 and C2 can filter out the electromagnetic interference introduced by the power grid. R1 is used to set the undervoltage value (UUV) and overvoltage value (UOV). When R1=619kΩ, UUV=619kΩ×50μA＋2.35V=33.3V, UOV=619kΩ×135μA＋2.5V=86.0V. When the input voltage is too high, R1 can also linearly reduce the maximum duty cycle to prevent magnetic saturation. R3 is the limit current setting resistor. When R3=11.1kΩ, the set drain limit current I′LIMIT=0.6ILIMIT=0.6×2.50A=1.5A. The voltage regulator VDZ1 (SMBJ150) in the circuit clamps the drain voltage and ensures the magnetic reset of the high-frequency transformer.

Figure 6 16.5W synchronous rectification DC/DC power converter circuit

The power supply uses SI4800 power MOSFET with extremely low drain-source on-state resistance as rectifier tube, with maximum drain-source voltage UDS(max)=30V, maximum gate-source voltage UGS(max)=±20V, maximum drain current of 9A (25℃) or 7A (70℃), peak drain current of up to 40A, and maximum power consumption of 2.5W (25℃) or 1.6W (70℃). SI4800 has a turn-on time tON=13ns (including turn-on delay time td(ON)=6ns, rise time tR=7ns), turn-off time tOFF=34ns (including turn-off delay time td(OFF)=23ns, fall time tF=11ns), and transconductance gFS=19S. The operating temperature range is -55～+150℃. SI4800 has a freewheeling diode VD inside, which is connected in parallel with reverse polarity between drain and source (negative pole connected to D, positive pole connected to S), which can protect the MOSFET power tube. The reverse recovery time of VD is trr = 25ns.

Power MOSFET is different from bipolar transistor. Its gate capacitance CGS is larger. CGS must be charged before it is turned on. Only when the voltage on CGS exceeds the gate-source turn-on voltage 〔UGS(th)〕, MOSFET starts to turn on. For SI4800, UGS(th)≥0.8V. In order to ensure that MOSFET is turned on, UGS used to charge CGS must be higher than the rated value, and the equivalent gate capacitance is also many times higher than CGS.

The relationship curve between the gate-source voltage (UGS) and the total gate charge (QG) of SI4800 is shown in Figure 7. It can be seen from Figure 7 that

QG = QGS + QGD + QOD (1)

Where: QGS is the gate-source charge;

QGD is the gate-drain charge, also known as the charge on the Miller capacitor;

QOD is the overcharge charge after the Miller capacitor is fully charged.

Figure 7 Relationship curve between UGS and QG of SI4800

When UGS = 5 V, QGS = 2.7 nC, QGD = 5 nC, QOD = 4.1 nC. Substituting them into equation (1), it is not difficult to calculate that the total gate charge QG = 11.8 nC.

The equivalent gate capacitance CEI is equal to the total gate charge divided by the gate-source voltage, that is,

CEI = QG / UGS (2)

Substituting QG = 11.8nC and UGS = 5V into equation (2), the equivalent gate capacitance CEI = 2.36nF can be calculated. It should be noted that the equivalent gate capacitance is much larger than the actual gate capacitance (i.e. CEI >> CGS). Therefore, the gate peak drive current IG (PK) required to conduct within the specified time should be calculated according to CEI. IG (PK) is equal to the total gate charge divided by the conduction time, i.e.

IG=QG／tON（3）

Substituting QG = 11.8nC and tON = 13ns into equation (3), we can calculate the required IG(PK) = 0.91A for turn-on.

The synchronous rectifier V2 is driven by the secondary voltage, and R2 is the gate load of V2. The synchronous freewheeling tube V1 is directly driven by the reset voltage of the high-frequency transformer, and V1 works only when V2 is cut off. When the Schottky diode VD2 is cut off, a part of the energy is stored in the common-mode choke L2. When the high-frequency transformer completes the reset, VD2 is turned on, and the electric energy in L2 continues to supply power to the load through VD2, maintaining the output voltage unchanged. The output of the auxiliary winding is rectified and filtered by VD1 and C4, and provides a bias voltage to the receiving tube in the optocoupler. C5 is a bypass capacitor at the control end. The time of power-on startup and automatic restart is determined by C6.

After the output voltage is divided by R10 and R11, it is compared with the 2.50V reference voltage in the adjustable precision shunt regulator LM431 to generate an error voltage, and then the duty cycle of DPA424R is controlled by the optocoupler PC357 to adjust the output voltage. R7, VD3 and C3 form a soft start circuit to avoid overshoot of the output voltage when the power is just turned on. When the power is just turned on, the voltage across C3 cannot change suddenly, so the LM431 does not work. As the output voltage of the rectifier filter increases and C3 is charged through R7, the voltage on C3 continues to increase, and the LM431 enters a normal working state. During the soft start process, the output voltage increases slowly and eventually reaches a stable value of 3.3V.

4 Conclusion

When designing low voltage, high current output DC/DC converters, the use of synchronous rectification technology can significantly improve power efficiency. When driving a high power synchronous rectifier, if the gate peak drive current IG(PK) is required to be ≥1A, CMOS high-speed power MOSFET drivers can also be used, such as TC4426A~TC4428A developed by Microchip.