Application of LDO low dropout linear regulator in switching power supply

Introduction to LDO

LDO is a micro-power low-dropout linear regulator, which usually has extremely low self-noise and high power supply rejection ratio PSRR (Power Supply Rejection Ratio).

The structure of the LDO low-dropout linear regulator is shown in Figure (2). It mainly includes a startup circuit, a constant current source bias unit, an enable circuit, an adjustment element, a reference source, an error amplifier, a feedback resistor network, and a protection circuit. The basic working principle is as follows: when the system is powered on, if the enable pin is at a high level, the circuit starts to start, the constant current source circuit provides bias for the entire circuit, the reference source voltage is quickly established, and the output continues to rise with the input. When the output is about to reach the specified value, the output feedback voltage obtained by the feedback network is also close to the reference voltage value. At this time, the error amplifier amplifies the small error signal between the output feedback voltage and the reference voltage, and then amplifies it to the output through the adjustment tube, thereby forming a negative feedback, which ensures that the output voltage is stable at the specified value. Similarly, if the input voltage changes or the output current changes, this closed loop will keep the output voltage unchanged, that is: Vout = (R1 + R2) / R2 × Vref

The actual low dropout linear regulator also has other functions such as load short circuit protection, overvoltage shutdown, overtemperature shutdown, reverse connection protection, etc.

LDO for switching power supply

At present, the typical packages of low-dropout linear regulators (LDO) produced by most IC design manufacturers are SOT23-5 and SOT23-3, such as SGM2007 and SGM2013 of Shengbang Microelectronics. Figure (3) is a typical application circuit diagram of SGM2007.

The switching power supplies currently sold on the market use bipolar transistors with a switching frequency of 100kHz and MOS-FETs with a switching frequency of 500kHz. The prominent disadvantage of switching power supplies is that they generate strong EMI. EMI signals have a wide frequency range and a certain amplitude. They will pollute the electromagnetic environment through conduction and radiation, and cause interference to communication equipment and electronic products. If not handled properly, the switching power supply itself will become a source of interference. When using a switching power supply as the input VIN of an LDO, pay attention to the LDO power supply rejection ratio and power consumption.

The power supply rejection ratio (PSRR) is an AC parameter that reflects the ability of the LDO output to suppress input ripple. Generally, the output and input frequencies are the same. The larger the PSRR value, the stronger the ripple capability of the LDO, which means that the input has little effect on the output. Although the power supply rejection ratio of the LDO is very strong, it is only very strong within a certain frequency range. Generally, the power supply rejection ratio between 50kHz and 200kHz is still very poor. Figure (4) shows the PSRR and frequency curve of the SGM2007. This frequency range is exactly the operating frequency of most switching power supplies. If the LDO load and input and output capacitors are not well matched, it is easy to cause LDO oscillation. This will cause instability in the entire LDO power supply system.

Most of the switching power supplies sold on the market have fixed voltage outputs, usually 5V outputs, while the most commonly used LDO outputs are 3.3V outputs. When the output of the switching power supply is used as the input of the LDO, there is a large voltage difference of 1.7V. If the LDO current is very large, such as 200mA, the temperature of the chip will be very high, the power consumption will be very large, and working at high temperature for a long time will affect the working life of the chip.

The power consumption of a low dropout linear regulator is mainly a function of the input voltage, output voltage and output current. The following equation can be used to calculate the power consumption under the worst case condition:

PD = (VINMAX-VOUTMIN) ILMAX. Where: PD = actual power consumption under the worst case, VINMAX = maximum voltage on the VIN pin, VOUTMIN = minimum voltage output by the regulator, ILMAX = maximum (load) output current.

The maximum allowable power dissipation (PDMAX) is a function of the maximum ambient temperature (*AX), the maximum allowable junction temperature (TJMAX) (+125°C), and the thermal resistance from junction to air (θJA). For a 5-pin SOT-23 packaged device mounted on a typical double-layer FR4 electrolytic copper PCB, (θJA) is approximately 250°C/Watt.

PDMAX = (*AX-TJMAX)/θJA

VINMAX=3.0V+10%, VOUTMIN=2.7V-2.5%, ILOADMAX=40mA, TJMAX=+125℃, *AX=+55℃

Actual power consumption PD = 26.7mW, maximum allowable power consumption: PDMAX = 280mW

When the switching power supply is used as the input of a low-dropout linear regulator, attention must be paid to the ripple of the switching power supply, the effect of the switching frequency on the LDO, and the matching of the LDO load capacitance. Do not exceed its maximum power consumption, which will affect the stability of the system.