Design of Distributed System Based on ARM Microcontroller LPC2138

Distributed Control System (DCS) is a comprehensive network system that uses computer technology to centrally monitor, manage and decentralized control the production process. At present, the distributed control system built by using microcontroller as the distributed control core through RS485 network has been widely used in the fields of industry, agriculture, medical treatment, etc., for example, distributed greenhouse environment information monitoring system, distributed underwater computer light control system, etc.

LPC2138 is a microcontroller based on ARM7TDMI-S core launched by Philips. It has a wide range of peripheral modules, powerful processing and control functions, and is very easy to build embedded systems. The distributed control system built with it is not only small in size and cost-effective, but also stable, reliable, powerful, and has a short development cycle.

Introduction to LPC2138 Microcontroller

LPC2138 has built-in 512KB high-speed Flash memory and 32KB RAM, and has rich peripheral resources: 2 32-bit timers (with capture and comparison channels); 2 10-bit 8-channel ADCs; 1 10-bit DAC; PWM channels; 47 GPIOs; 9 edge- or level-triggered external interrupts;

RTC; multiple serial interfaces (UART, I2C, SPI, SSP). It contains a vector interrupt controller with configurable interrupt priority and vector address. The on-chip Boot loader can implement in-system/in-application programming (ISP/IAP). The on-chip PLL can achieve a CPU operating frequency of 60MHz. It has two low-power modes, idle and power-down, and can be woken up by external interrupts.

Control system design

In distributed control systems, general-purpose single-chip microcomputers are generally used as the core of control processing. Not only are they slow and have weak information processing capabilities, but they also generally require the addition of many peripheral circuits, such as RAM, ROM, ADC, DAC, watchdog, etc. A distributed control system using the ARM microcontroller LPC2138 as the core can achieve a powerful system by expanding simple peripheral circuits (display module, interrupt keyboard, RS485 module) and developing corresponding embedded programs. It not only has high system integration and stability, but also has a relatively short development cycle. The overall block diagram of the system designed in this paper is shown in Figure 1, which includes an OLED display, an interrupt keyboard, an RS485 interface, and an EXT_CON interface (a reserved interface for function expansion).

Figure 1 System overall design block diagram

Display system design

The system display module uses the OLED display module VGS12864E, which is a 64×128 matrix monochrome graphic character display module. Due to the use of organic light-emitting technology, no backlight is required, so it can present clearer images and data under sunlight than traditional LCDs. In addition, it also has superior characteristics such as high brightness, high contrast, wide viewing angle, low driving voltage and high luminous efficiency. The wide temperature range (storage temperature: -30℃~80℃, operating temperature: -20℃~70℃) can also adapt to more severe environments.

VGS12864E uses two column drive controllers, embedded with 64×64 display data RAM. Each bit of data in the RAM corresponds to the brightness or darkness of a point on the screen. Each half screen is divided into eight pages by row. Because each byte of data is arranged in a structure with the low bit (LSB) at the top and the high bit (MSB) at the bottom, when extracting the font library, the font model needs to be set as: vertical model, byte reverse order. Its connection with LPC2138 is shown in Figure 2. A level conversion chip needs to be added between ARM and OLED. This design uses the 16-bit bidirectional level conversion chip IDT74FCT164245. In addition, direction control is required when performing level conversion (DIR in Figure 2 is the direction control pin).

Figure 2 OLED display connection diagram

RS485 interface circuit design

The RS485 communication part uses TI's SN65HVD24 transceiver chip, which has a high common-mode voltage range (-20~25V), supports up to 256 nodes, up to 16kV ESD, and a communication rate of up to 3Mbps at 500m. In order to prevent external interference from being introduced into the microcontroller during serial communication, an optoelectronic isolation circuit is added between the microcontroller and the RS485 communication chip. The circuit diagram is shown in Figure 3.

Figure 3 RS485 communication interface circuit diagram non-polarity connection design

Achieving non-polarity connection is beneficial to engineering construction and convenient for system expansion. Although the differential Manchester encoding method has high reliability, it requires the addition of a codec, which increases the hardware complexity. This system is implemented using XOR gates and software programming. That is, an XOR gate is added to the information input and output part for control. When the connection is wrong, the control pin outputs a high level to invert the information. When the connection is correct, the pin outputs a low level and the information remains unchanged. The system's automatic information monitoring and automatic control are realized through the program. The host sends system self-test information, including a forward data message and a reverse data message. The information contains positive and negative information codes. When the slave receives this information, it can automatically adjust its control end to perform corresponding control operations. Using this method, only a small amount of software and hardware overhead is required to achieve non-polarity control.

In Application Programming (IAP) implementation

In many situations (such as underground lighting control and soil testing), it is not easy to reconfigure the system and update the program after the system is deployed. Therefore, the use of IAP technology not only enhances the system's adaptability and increases its working life, but also makes maintenance more convenient.

The IAP program of LPC2138 is located in the Boot Block, which occupies 12KB of storage space and is located in the Flash at address 0x0007D000~0x0007FFFF. At the same time, its lowest 64 bytes also appear in the Flash memory area starting from address 0x00000000, so the interrupt vector is activated after reset and jumps to the entry of the Boot Block loader. The Boot loader controls the initialization operation after reset and provides a method to implement Flash programming.

The IAP program is Thumb code, located at address 0x7FFFFFF0 (remapped address). The IAP function can be called using the following C code.

(1) Define the entry address of the IAP program (since the 0th bit of the IAP address is 1, when the program counter is transferred to this address, it will cause a change in the Thumb instruction set)

#define IAP_LOCATION 0x7FFFFFF1

(2) Define data structures or pointers

unsigned long command[5];

unsigned long result[2];

(3) Define function type pointer

Typedef void (*IAP) (unsigned int[],unsigned int[]);

IAP iap_entry;

(4) Setting the function pointer

iap_entry = (IAP) IAP_LOCATION;

(5) Call IAP

iap_entry (command,result);

The program development uses ARM's integrated development tool ADS1.2, which divides the terminal program into two parts: the main program and the update program:

The main program is used to implement the functions of the terminal and is the part that needs to be updated. The update program is only responsible for updating the main program. When compiling and linking, the main program occupies sectors 0 to 14, the update program occupies sectors 22 to 26, and sectors 15 to 21 are used to store the main program to be updated. The data used by the update program is defined in the 0x40007800 to 0x40007FFF area in the on-chip RAM. In addition, in order to achieve precise positioning of the main program and the update program, the Linktype in ARMLinker is set to Scattered mode, which can generate an ELF format image file according to the address mapping specified in the format file.

The update process can be roughly divided into two stages: program update preparation and program update:

The preparation phase is completed in three steps. First, the master station divides the compiled new terminal main program (excluding the update module) into small data units and transmits it to the

The terminal stores the received verified data into the on-chip Flash memory, and then the master station inquires about the reception status of the terminal code and re-transmits the part with transmission error to correct it. Finally, the master station sends the start update instruction, the terminal verifies the correctness of the program data and sets the update flag, stops refreshing the watchdog, and resets the terminal.

The program update is completed in two steps. First, when the terminal restarts and detects that the update flag is valid, the update program can be called to update the program. After the program update is completed, the terminal is reset again to run the updated program code, completing the entire program update process.

In addition, since the IAP service code is a Thumb instruction, when calling it directly with a C program, you must select the Arm/ThumbInte2rworking item when setting the compilation parameter ATPCS. Since the execution of the IAP command uses the top 32 bytes of the on-chip RAM, the user program should not use this space. Before calling the IAP function, turn off the PLL, MAM (memory acceleration module) components and all interrupts, and set the system clock correctly.

Conclusion

The distributed control system based on ARM microprocessor not only improves the system integration, enhances the system function and system stability, but also improves the system intelligence through its powerful processing capability and IAP technology, which is in line with the development direction of distributed control system.