Design of RF transceiver based on TDA5255

Publisher:SereneDreamerLatest update time:2014-12-14 Source: 互联网Keywords:TDA5255 Reading articles on mobile phones Scan QR code
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  1 Introduction

 

  As a kind of wireless access communication method, short-range wireless data communication can be widely used in remote control, alarm, telemetry and other fields. Using RF transceiver devices to design RF transceivers is an important way to achieve short-range information transmission. This paper designs an RF transceiver based on Infineon's RF transceiver TDA5255 and XC866 microcontroller to achieve information transmission.

  2  TDA5255 RF transceiver

  2.1 Main features

  TDA5255 is a low-power, monolithic FSK/ASK transceiver suitable for 433 MHz ~ 435 MHz half-duplex low data rate communication. The device has high integration and simple peripheral circuits. It contains a power amplifier, low noise amplifier, AGC control circuit, double balanced mixer, synthesized converter, I/Q limiter, RRSI generator, FSK demodulator, fully integrated VCO and PLL synthesizer, adjustable crystal oscillator, data filter, data comparator, positive and negative peak detector, data rate detection circuit and bus interface. It can also provide low power mode, low current consumption (9 mA in receiving mode, 12 mA in transmitting mode), power supply voltage of 2.1 V ~ 5 V, FSK/ASK modulation and demodulation, I2C/3-wire microcontroller interface, internal low-pass channel selection filter and data filter can adjust bandwidth. The data limiter self-adjusts the threshold. The FSK receiving sensitivity is -109 dBm, the transmitting power is +13 dBm, and the maximum data rate can reach 100 kb/s. It can be used in low data rate communication systems, wireless entry systems, remote control systems, alarm systems, telemetry systems, home automation systems, etc.

  2.2 Working mode settings

  The basic working modes of TDA5255 include: transmit/receive mode, ASK/FSK modulation, high transmit power consumption/low transmit power consumption mode, which can be controlled by the corresponding pins Rx/Tx, ASK/FSK, PWD/DD.

  In addition, TDA5255 can select I2C bus protocol or 3-wire bus protocol through BUSMODE pin. The working mode is selected by modifying the value of TDA5255 internal register. But in this case, first modify the D12 bit in CONFIG register in TDA5255. When D12=0, the working mode is external control; when D12=1, internal control is adopted, that is, the internal register controls the sending mode/receiving mode, ASK modulation/FSK modulation, high transmission power consumption mode/low transmission power consumption mode, and is not controlled by external pins.

  Other operating parameters of TDA5255 can be set by modifying the values ​​of its internal registers, including the frequency division output clock frequency, FSK frequency shift value, RSSI signal threshold, etc.

  2.3 Hardware Circuit Design

  There are 7 wires between the microcontroller and the RF chip, namely power, ground, BUSCLK, BUSDATA, Rx/Tx, DATA, and PWD/DD, as shown in Figure 1.

  

 

  When BUSMODE=0, the bus mode of TDA5255 is I2C. The microcontroller sets the working mode of TDA5255 through the I2C bus. BUSCLK and BUSDATA are the bus clock line and bus data line respectively.

  When the Rx/Tx pin is floating or at a high level, the TDA5255 is in the transmitting state. At this time, the RF signal is transmitted from the antenna through C6, C8, C9, L1, and C11 to the input pin of the low noise amplifier. R9 is a high impedance and does not affect the circuit matching. C6 is a DC decoupling capacitor. The other input signal of the differential low noise amplifier can be AC ​​coupled through a large capacitor. At this time, the differential low noise amplifier acts as a single-ended low noise amplifier that is easier to match. The important matching components are C8, C9, L1, and C11.

  The device can be placed in the receive state by grounding the Rx/Tx pin or by programming. At this time, the Rx/Tx pin operates in an open-drain state, outputs logic low, and has low impedance to RF. DC current flows from VCC to GND through L2, L3, D2, R9 and D1. Because R9 has high impedance, the capacitance of C6, C4, and C5 is large. The circuit can simplify the RF signal. At this time, the LNA RF is grounded, so there is no power consumption at the LNA input. The power amplifier matching mainly depends on C8, C28, L2, C29 and L3. It should be noted that when designing the power amplifier matching, C8 cannot be modified because its value has been determined by the LNA input matching. To accurately calculate the external capacitance, the capacitance on the pad and the parasitic capacitance between the pin and the switch (C20, C22, C23) must be considered.

  The PWD/DD pin is used to set the high and low power consumption modes of the RF device. The DATA pin is a data pin. In the transmission mode, the microcontroller sends a signal to the RF device. In the receiving mode, if the signal can be received, the waveform of this pin is the same as that of the transmitting end, and the test delay is 25μs. When no signal is received, the pin outputs irregular pulse noise. In actual use, the RSSI signal threshold value of TDA5255 can be modified to remove noise, so that the DATA pin remains at a low level when no valid information is received.

  3 Microcontroller and software design

  3.1 Introduction to XC866 MCU

  The microcontroller uses Infineon's XC866 8-bit single-chip microcomputer. The design of XC866 is based on the XC800 core compatible with the standard 8051 processor. XC866 has an internal integrated oscillator or an embedded voltage regulator (can be powered by a single 3.3 V or 5.0 V power supply).

  The XC866's synchronous serial channel (SSC) supports full-duplex and half-duplex synchronous communication. Data is sent and received via the TXD and RXD lines, which are usually connected to the MTSR (Master Transmit/Slave Receive) and MRST (Master Receive/Slave Transmit) pins, respectively. The clock signal is output by the MS_CLK (Master Serial Shift Clock) or input from the SS_CLK (Slave Serial Shift Clock), which are usually connected to the SCLK pin. There are buffer registers for both sending and receiving data. Half-duplex communication is used when transmitting information with the TDA5255, and the internal register values ​​of the TDA5255 are set through the I2C bus protocol.

  The microcontroller completes the working mode setting of TDA5255, controls TDA5255 to send valid information, receives and processes the data received by TDA5255, etc. P1.0 and P1.1 are connected to RXD0 and TXD0 of MAX3232 respectively, which are used to complete the serial communication with the PC.

  3.2 Software Design

  The software program flow chart is shown in Figure 2.

  

 

  The data transmission adopts sending a "0" first, then a "1", and then sending the information bit "0" or "1". In this way, after the rising edge, the information code can be obtained by delaying 1.5 basic times. As shown in Figure 3. The definition of the basic time determines the transmission rate of the information. Here, 100μs is taken. An information code is sent every 300μs, and the transmission rate is 3.3kb/s. The maximum data rate of TDA5255 can reach 100 kb/s.

  

 

  4 Conclusion

  The designed RF transceiver can transmit information over short distances, send any information from the PC through the connection with the PC, and display the feedback information obtained on the host computer interface. The system is applied to the controller of the electric car with good control effect. It can also be transplanted as a module and applied to short-distance remote control and other aspects.

Keywords:TDA5255 Reference address:Design of RF transceiver based on TDA5255

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