Designing Ultra-Low-Power Embedded Applications: Five Power Modes Explained

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  Generally speaking, SoCs support more low-power modes than traditional MCUs. This is because SoCs are highly integrated, have more on-chip components, and multiple power configurations to support different operating requirements. The number of power modes and the resources available in each mode vary from device to device. For example, in a low-power mode, one device can power down all other components while only keeping registers and RAM contents, while another device only powers down the CPU while leaving other resources running. Different manufacturers use different naming methods for these modes. In this article, we will take Cypress's PSoC 4 device as an example to explain the various power modes in detail.

  The following power modes are also supported by most devices from other manufacturers:

  ●Working mode

  Sleep mode

  Deep sleep mode

  Hibernation mode

  Stop mode

  Let's take a look at the specifics of these power modes:

  1. Working mode: In this mode, the CPU and all other on-chip resources operate normally. This mode is the most important component of the overall system power consumption. In this mode, if not in use, various peripherals on the chip can be powered off separately.

  2. Sleep: This is another common power mode for controllers. This mode is mainly related to the CPU. When the CPU enters sleep mode, its clock is removed. The only impact of the CPU on the total power consumption at this time is static power consumption, because there is no clock switching work at this time, and there is no dynamic power consumption. Other peripherals such as ADC and comparators are available in this mode.

  3. Deep Sleep: In this power mode, even the system clock is disabled, so all high-frequency resources are unavailable in this mode. However, the current state of these resources is not affected, that is, the current state of the CPU registers, SRAM, etc. is not affected. Since the high-frequency clock is disabled, the power consumed by the switch can be saved. Usually, the deep sleep mode provides the option of running with a low-frequency clock, which can be used to drive low-frequency resources such as timers. In addition, this mode allows developers to use communication protocol blocks such as I2C slave devices, which do not require the device to generate its own clock. This is possible because the main way to enter this mode is to disable the system master clock. However, the module can still be powered on. The impact of this mode on power consumption is mainly the static power consumption of all clocks on the chip.

  4. Hibernation: In this mode, all clocks are turned off, including the low-speed oscillator. All on-chip resources, except for those used for external event-triggered wake-up, are powered off. Since almost all components are powered off in this mode, this mode can reduce static and dynamic power consumption components, thereby achieving the lowest power consumption.

  5. Stop: As the name implies, stop mode is to cut off the power of all peripherals, even the contents of RAM and CPU registers are not retained. In PSoC 4 and other similar devices, only the state of IO pins is retained in this mode. Waking up from this mode will enter chip restart.

  When analyzing the power consumption of an application, it is important to look at power consumption in all power modes.

  It is important to identify the wakeup sources that can be provided in a certain mode. For example, a certain interrupt is required to wake up from sleep mode, and an I2C address match interrupt is required to wake up the device in hibernation mode. It is necessary to understand which resources work in each mode and what wakeup resources can be provided. For example, a comparator interrupt can be used as a wakeup source in the system, and an analog input can be used to wake up the system when a set threshold is exceeded. For the application shown in Figure 1, a GPIO interrupt or even a hard reset is required for wakeup because the RTC will run at any time and the controller does not need to maintain the previous state.

  In hibernation and stop modes, power consumption can be as low as 100nA. As for the RTC itself, you can easily find very low power RTCs (consuming only 100-200nA). Assuming the controller is driving the LCD directly, we can assume that the LCD's off state consumes zero power.

  This puts the average power consumption in the range of 300nA in the system shown in Figure 1. If we assume that the design uses a CR2032 as the power source, the battery capacity is about 225mAh. At 300nA, the battery can support 70 to 80 years of operation only if the device is always in power-off mode.

  Each time a key is pressed, the controller wakes up. This increases the power consumption of the controller to the range of 500μA-1mA. Assuming the power consumption is around 1mA, the controller gets the data from the RTC and displays it on the LCD. The controller only needs a short time to perform this work, but the display needs to remain on for a long time (let's say the display is on for 10 seconds to ensure that the user can see the data). As a direct drive LCD, the controller must remain on for a long time, which means it consumes more charge. In this case, devices such as Cypress's PSoC4 provide low-power modes that allow the device to shut down all other peripherals and only run the modules required to drive the LCD. In this device, the LCD driver runs in a specific low-power mode, which is called digital correlation mode. The result is a significant reduction in current consumption.

  

 

  Figure 2: Current consumption in various states

  Each key press will experience the current curve shown in Figure 2. The area below the curve is the typical power consumption of a single key press. The consumed charge is calculated as follows:

  Q = (1mA*1ms) + (20μA*10s)

  Based on the data above, we can calculate how many key presses a given power supply can support.

  The amount of time spent in active mode is important because this mode consumes the most power. One option is to keep the MCU in active mode but with a lower CPU clock speed, thereby reducing the power consumption in active mode. However, this will result in higher average power consumption because the time spent in active mode depends on the clock frequency. Since the MCU must be in active mode at this time, the power consumption depends on the time the MCU spends processing data. A faster MCU can complete the task quickly, thereby extending the time in low-power mode, which also allows the system to reduce power consumption. System designers can determine the best configuration based on system requirements.

  In the next part of this series, we will take a larger system as an example and show how to reduce the average power consumption. We will also explore some system-level techniques for reducing average power consumption.

Reference address:Designing Ultra-Low-Power Embedded Applications: Five Power Modes Explained

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