Supercapacitor charging solution Large capacitor charging solution

　　Supercapacitors (SC) or ultracapacitors, also known as electric double-layer capacitors, are increasingly being used in a variety of power management systems. In automotive applications such as start-stop systems with regenerative braking, supercapacitors can provide the energy required to engage the starter to restart the combustion engine and receive kinetic energy recovered during braking. The advantage of supercapacitors is that they can be charged and discharged significantly more times than traditional lead-acid batteries, while being able to absorb energy more quickly without reducing their life expectancy. These characteristics also make supercapacitors attractive for industrial backup power systems, fast-charging cordless power tools, and remote sensors, where frequent battery replacement is impractical.

　　This article discusses the challenges of charging these large capacitors and shows power system designers how to evaluate and select the best system configuration for backup energy storage applications. An example supercapacitor charger solution is introduced with waveforms and detailed explanations.

　　System Details

　　Many system configurations use supercapacitor banks as backup energy storage components. Initially, design engineers need to determine their energy storage configuration goals and then decide what voltage can be used to store energy. Solution selection depends on the power and voltage requirements of the load, as well as the energy and voltage capabilities of the supercapacitors. After determining the best solution, overall performance must be balanced against cost.

　　Figure 1 shows a block diagram of a high-efficiency solution where the load is a device that requires a regulated input voltage (3.3V, 5V, 12V, etc.). The 48V main power supply powers the normal operation of the switching regulator 2 (SW2), while charging the supercapacitor bank through the switching regulator 1 (SW1) to 25V. When the main power is disconnected, the supercapacitor bank supplies power to SW2 to maintain continuous operation of the load.

　　Figure 1. Block diagram of a battery backup system using a supercapacitor bank.

　　After selecting the supercapacitor, the system engineer must also select the target voltage for charging the supercapacitor, based on the supercapacitor rating curve. Most supercapacitor units have a rated voltage range of 2.5V-3.3V at room temperature, and this rating drops at higher temperatures, resulting in a longer life expectancy. Typically, the charging target voltage setting should be lower than the maximum rated voltage to extend the working life of the supercapacitor.

　　Next, the desired voltage of the supercapacitor bank and the SW2 topology need to be selected. The supercapacitor bank configuration can be parallel, series, or a combination of series strings in parallel. Because the unit capacitor voltage rating is usually less than 3.3V, and the load often requires an equal or higher supply voltage, the options for the capacitor unit configuration and SW2 are to use a single capacitor unit with a boost converter, or multiple capacitor units in series with a buck or buck-boost regulator. If a boost configuration is used, we must ensure that the voltage does not drop below the minimum operating input voltage of SW2 when the supercapacitor is discharged. This voltage drop can be as much as half of the supercapacitor charging voltage, so for this reason, we will use an example of a supercapacitor bank consisting of a series supercapacitor combination and a simple buck regulator (SW1). Then, if the energy requirements require it, multiple series capacitor strings will be connected in parallel.

　　If a series combination of supercapacitors is chosen, the number of capacitor units used must be selected based on the maximum expected voltage at the top of the capacitor string. More series capacitors means a supercapacitor string with smaller capacitance and higher voltage. For example, suppose you choose to use two strings of four 2.7V 10F capacitors and one string of eight identical capacitors (in series). Although the total charge and energy that can be stored is the same in both configurations, the available voltage range of the capacitor string gives a single series string an advantage. For example, if there is a load that requires a 5V bias, the voltage required for SW2 is about 6V (taking into account its maximum duty cycle and other voltage drop factors).

　　●Energy in capacitor W=CV2/2, available energy W= C/2 (Vcharge2 - Vdicharge2)

　　●For two strings of 4 capacitors each, the available energy W = 2*[(10F/4)/2*((2.7V*4)2-6V2)] = 201.6J

　　●For a single capacitor string containing 8 capacitors (in series), the available energy W = 1*[(10F/8)/2*((2.7V*8)2-6V2)] = 269.1J

　　Because both banks can store the same total energy, the lower voltage string has a greater percentage of wasted/unusable charge. In this case, a higher string voltage is preferred to fully utilize the supercapacitors.

　　The third system challenge comes from how to charge the supercapacitor bank. Initially, when the supercapacitor voltage is 0, SW1 needs to work for quite a long time in a condition similar to an output short circuit due to the high capacitance. Conventional SW1 may get stuck in hiccup mode and fail to charge the supercapacitor. To protect the supercapacitor and SW1, additional current limiting function is required at the beginning of the charging phase. A satisfactory solution is to let SW1 provide continuous charging current for an extended time under the condition of almost no output voltage.

　　There are many ways to charge a supercapacitor. Constant current/constant voltage (CICV) is the commonly used preferred method, as shown in Figure 2 (CIVE curve). At the beginning of the charging cycle, the charging device (SW1) operates in constant current mode, providing a constant current to the supercapacitor, causing its voltage to increase linearly. When the supercapacitor is charged to the target voltage, the constant voltage loop is activated and accurately controls the supercapacitor charge level to keep it constant to avoid overcharging. Again, this preferred solution also places requirements on power management functions that need to be considered in the design.

　　Figure 2. CICV supercapacitor charging control

　　Taking Figure 1 as an example, with a 48V main power supply, a 25V supercapacitor bank voltage, and a load voltage of 3.3V, 5V, 12V, etc., it is appropriate to select a synchronous buck function for SW1 and SW2. Since the main challenge is related to supercapacitor charging, the choice for SW1 is very important. The ideal solution for SW1 requires power management functions that can operate at high input (48V) and output (25V) voltages while providing CICV modulation.

　　Supercapacitor Charger Solution Example

　　To illustrate the supercapacitor charging behavior, we take a synchronous buck regulator as an example. The key issues and solution techniques are explained, and experimental waveforms are used to help understand.

　　Figure 3. Simplified schematic of a synchronous buck regulator implementing CICV supercapacitor charging control.

　　Figure 3 shows a simplified schematic of a synchronous buck regulator implementing CICV mode controlled by Intersil’s ISL78268. To charge the supercapacitor bank to 25V under CICV control, the following features were considered in selecting the controller:

　　1. Synchronous buck controller capable of operating at VIN>= 48V and VOUT>= 25V.

　　2. Constant current and constant voltage regulation capability, can automatically switch regulation mode.

　　3. Implement accurate current sensing input over the system supply voltage range to implement CI mode. Referring to Figure 3, the controller senses the continuous current of the inductor, which is the charging current. The controller's current sensing amplifier must be able to withstand the common-mode voltage, which is 25V in this case.

　　A small portion of the functional block diagram of the ISL78268 synchronous buck controller is shown in Figure 4. As shown, there are two independent error amplifiers, labeled Gm1 and Gm2, used to achieve constant voltage (Gm1) and constant current (Gm2).

　　The error amplifier Gm1 is used for CV closed-loop control. It compares the feedback voltage of FB with the internal 1.6V reference voltage and generates an error voltage at the COMP pin. The FB pin is connected to a resistor divider from the output voltage and is set so that the FB voltage is 1.6V when the output voltage is at the expected voltage level. The COMP voltage then represents the difference between the expected output voltage and the actual output voltage. COMP is then compared with the inductor current to generate a PWM signal to control the output voltage to keep it constant.

　　The error amplifier Gm2 is used for CI closed-loop control. It compares the IMON/DE pin voltage with the internal 1.6V reference voltage and generates an error voltage at the COMP pin. The IMON/DE pin voltage is generated internally and represents the average output inductor current load value. Therefore, the COMP voltage represents the difference between the expected output current and the actual output current when the Gm2 loop is activated (the diode between the outputs of Gm1 and Gm2 effectively selects which loop is active). COMP is then compared with the inductor current to generate a PWM signal to control the output voltage to keep it constant.

　　In the charging stage before the supercapacitor voltage reaches the target voltage, the output of Gm2 drives the COMP pin to generate PWM output to achieve CI control. When the supercapacitor voltage reaches the target value, the charging current decreases, causing the IMON/DE pin voltage to decrease and the CI loop to disconnect (when IMON/DE < 1.6V), so the CV loop naturally takes over the control of COMP, thereby keeping the output voltage constant.

　　The ISL78268 buck controller has both a peak current mode PWM controller (reliable cycle-by-cycle peak current modulator) and an external constant average current loop that is ideal for supercapacitor charging.

　　Figure 4. Simplified block diagram of the ISL78268 CICV circuit

　　Now we can focus on the implemented supercapacitor charging implementation. Figures 5, 6 and 7 show the experimental waveforms of a synchronous buck controller controlled by the ISL78268 to charge a supercapacitor bank (12 50F/2.7V series capacitors). The supercapacitors will be charged to 25V from the main power supply.

　　Figure 5. Experimental waveform of supercapacitor charging

　　Figure 5 shows that there are multiple stages in supercapacitor charging. Initially, in stage 1, Vo is almost 0. The average current signal on the IMON/DE pin of the ISL78268 has not yet reached 1.6V (the reference value of the desired charging current), so the CI loop is not yet engaged. In this stage, the peak current of the inductor is limited cycle by cycle to a fixed OC threshold. At the beginning of the charging stage when VOUT is at a low level (FB < 0.4V), the switching frequency is limited to a maximum of 50kHz to prevent the mentioned inductor runaway problem caused by peak current limiting at low VOUT.

　　Figure 6 shows a zoomed-in view of the waveforms during Phase 1. Phase 2 begins when the IMON/DE pin voltage (yellow trace) reaches 1.6V. During this phase, the CI loop turns on and pulls the COMP signal (cyan trace) low, which begins to regulate the output current and keeps the IMON/DE pin voltage constant. The IMON/DE pin voltage represents the sensed average output current signal. The IL waveform (green trace) shows that the average current is controlled to a constant level during Phase 2. The output voltage waveform (pink trace) shows that the supercapacitor is charged linearly by the constant charge current.

　　Figure 6. Amplified waveform of the supercapacitor charging phase 1

　　Phase 3 starts when the FB pin detects 0.4V (Figure 7). After this trigger, the constant current regulation loop is fully turned on, so the switching frequency is automatically adjusted to the pre-programmed 300kHz. At higher switching frequencies, the inductor current ripple (green trace) is significantly reduced. The output voltage (pink trace) continues to increase linearly, indicating that the supercapacitor is charged linearly.

　　Figure 7. Experimental waveform of supercapacitor charging

　　Returning to Figure 5, Phase 3 ends when Vo reaches the target voltage of 25V. At this point, the CV loop is turned on and stabilizes the output voltage. The average current loop is turned off. Figure 5 shows that the output voltage (pink trace) flattens and the inductor current decreases. The IMON/DE pin current, which represents the average charging current, also decreases, indicating the end of the constant current regulation process.

　　Conclusion

　　Supercapacitors are used as energy storage solutions in automotive, industrial, and consumer products due to their inherent physical characteristics that offer advantages over traditional batteries. To maximize the storable energy in a supercapacitor bank, the best approach is often to connect multiple supercapacitor cells in series to achieve a high bank voltage. When charging, it is best to use the CICV method to limit the high current generated due to the low ESR of the supercapacitor during charging to a constant voltage. Constant current also allows for controllable charging losses, which can reduce the heat generated and extend the life of the supercapacitor. Therefore, it is beneficial to have the charging circuit tolerate high voltages and provide CICV control capabilities.