Software Design of Pulse/Data Generator Based on Embedded WinCE 6.0

　　As a universal test signal source, the pulse/data generator can generate three types of signal outputs: pulse, group pulse and data. The continuously adjustable pulse signal and large-capacity, diversified digital signal meet the test requirements of noise tolerance in high-speed digital devices and the demand for excitation signal sources in the early design of large integrated circuits and radio frequency systems. With the rapid development and widespread application of embedded technology, the development of intelligent instruments and equipment using embedded operating system support is becoming the mainstream. Win CE system is a 32-bit embedded operating system launched by Microsoft Corporation of the United States. It can realize real-time, multi-tasking, multi-threaded operations and has an excellent graphical user interface. This paper implements a pulse/data generator application software design supported by the embedded WinCE system.

　　1 System Design

　　The pulse/data generator system structure is shown in Figure 1, which includes an embedded system, a control mainboard module, a trigger module, a clock module, and an analog channel output module. In the entire system, each module supports each other and works in coordination according to certain functions.

　　The clock module can generate the continuously adjustable, high-precision clock signal required by the system; the trigger module is used to receive external trigger signals to achieve synchronization with external circuits; the analog channel output module realizes the control and adjustment of the amplitude, level, and edge of the pulse and data signals generated by the previous stage; the control motherboard module uses FPGA to build the main control logic system to realize related controls such as trigger mode, clock frequency, pulse generation, and data address generation.

　　Embedded systems and the application software running on them are at the forefront of the entire system architecture.

　　The instrument receives the operator's instructions through the human-machine interface and exchanges data with the control mainboard at the back stage. Finally, the control mainboard controls the subsequent hardware modules to complete the user's instructions, and obtains the corresponding pulse signal and serial data signal at the output end of the analog channel. In order to meet the real-time requirements of the instrument, the embedded operating system selects WinCE 6.0, and the microprocessor selects Samsung's S3C2440A, whose core is ARM920T, which can meet the requirements of low price, low power consumption and high performance.

　　2 Human-machine interface development software integrated development environment VisualStudio 2005 provided by Microsoft was selected. Platform Builder for CE6.0 used for customizing the system was integrated into Visual Studio 2005 as a plug-in, so that the customized operating system and the development of application programs are in the same development environment, avoiding the trouble of frequent switching of development environments. After completing the customization of the WinCE operating system and exporting the software development kit SDK, the development of drivers and applications can be carried out [4]. As a modern electronic measuring instrument, the software development of the pulse generator includes two parts: interface design and function design.

　　The interface is a bridge for information transmission between humans and machines, and is an important part of the instrument. The interface design needs to complete a simple and friendly human-machine interface, and the user controls the instrument through the operation interface. The human-machine interface software flow is shown in Figure 2. The functional design is based on the hardware module, and each function of the instrument system is realized around the hardware module.

　　After the system is started, the software starts and runs automatically. First, it performs a self-test to confirm whether the hardware devices of the instrument are working properly. Then the main thread starts and performs initialization work. All engineering variables are initialized in turn, and all pages are created and initialized to the state before the last shutdown. Then it enters the message loop and establishes an error information report loop. The program continuously checks the error message queue to see if there is an error. Once it is found that there is an error in the error message queue that needs to be responded to, it reads and processes the error message report in turn, and then executes the corresponding function. For example, when the user makes an error, the error message display will pop up to prompt the user the correct operation method until the user operates correctly. If a keyboard message arrives, it will be handed over to the corresponding pages through the main thread to respond to the control message, so as to achieve the purpose of information interaction with the instrument operator. The entire human-computer interface design is based on the CFormView class. Modules such as keyboard information processing are designed in the form of dynamic link libraries, which not only saves system resources, but also facilitates the maintenance and upgrade of the program in the future.

　　3. Implementation of Data Transmission

　　The function of data transmission is to realize data communication between the upper application software and the underlying hardware system of the pulse/signal generator. The embedded WinCE6.0 operating system controls the control motherboard module and finally realizes the control of each hardware. The GPIO port operation of ARM can realize this functional requirement. S3C2440A provides 130 general IO ports.

　　GPIO operations are mainly implemented by registers such as the port configuration register GPXCON, the port data register GPXDAT, and the interface pull-up resistor setting register GPXUP (where X represents the corresponding GPA to GPJ port).

　　In WinCE 6.0 system, the real address of GPIO (for example, the base address of GPIO of S3C2440A is 0X56000000) is mapped to the virtual address space (corresponding to 0XB1600000). By operating this virtual address space, the control, input and output of GPIO or other on-chip resources can be completed. Two key functions VirtualAlloc and VirtualCopy are needed in programming. First, VirtualAlloc is used to obtain the allocation of a virtual address space, and then VirtualCopy binds a virtual address to a physical address to achieve access to physical hardware. In order to enhance the security and stability of the system, WinCE 6.0 strengthens the restrictions on virtual address access, and the driver is placed in the kernel space, so that WinCE6.0 can no longer directly operate on the physical address in the application. Although VirtualAlloc and VirtualCopy cannot be called in the upper application, the driver can be written in kernel mode and memory mapping can be performed through VirtualAlloc and VirtualCopy. Therefore, in WinCE6.0 system, one method to access the physical address is to write a stream driver in kernel mode, compile the driver into the kernel and then download it to NandFlash. The relevant code is as follows: 　　volatile S3C2440A_IOPReg *v_pIOPRegs;

　　/*Apply for space*/

　　v_pIOPRegs=

　　(volatile S3C2440A_IOPReg *) VirtualAlloc (0,

　　sizeof

　　(S3C2440A_IOPReg),

　　MEM_RESERVE,PAGE_NOACCESS);

　　i(f /*Application for space failed*/)

　　{/* handle the error and return */

　　} else {/*Mapping*/

　　if (!VirtualCopy ( (PVOID) v_pIOPRegs, (PVOID)

　　(S3C2440A_IOBase》8) , sizeof (S3C2440A_IOPReg) ,

　　PAGE_READWRITE|PAGE_NOCACHE ))

　　{/

　　*If the mapping fails, release the requested space and return*/}}

　　S3C2440A integrates multiple interfaces and buses. The SRAM interface based on the general chip select nGCSn has the characteristics of simple configuration, few logic control signals, high addressing and data reading and writing speed, so nGCS2 is selected as the chip select signal, and the write enable signal nWE and the read enable signal nOE are used to complete the operation of the pulse/data generator single data channel.

　　The nGCS2 chip select signal is low effective, and the corresponding port is PortA. Its 13th bit is used to control nGCS2. The corresponding configuration register is GPACON, and the data register is GPADAT. Their corresponding physical addresses are 0X56000000 and 0X56000004 respectively. When GPA13 is set to 0, nGCS2 is a normal input and output port; when it is set to 1, nGCS2 becomes an enable signal. Other signal settings are similar. In this project, nGCS2 is set to an enable signal as required:

　　v_pIOPRegs->rGPACON |=(0×01《13);

　　BWSCON is the bus width and delay control register, which can be used to configure the bus width of 8b, 16b or 32b. Set it to 32b bus width:

　　v_pMEMRegs - >rBWSCON=(v_pMEMRegs - >rBWSCON~(0XF《8))(| 0XE《8);The process of compiling the driver into the kernel is as follows: Create a driver folder in the BSP and develop the stream driver. After completion, create a makefile, module export file, and sources file for compilation. Finally, add the GPIO stream driver to the registry, add the driver to NK, compile it with Platform Builder 6.0 in Visual Studio 2005 to get the NK.bin file, and download it to NandFlash.

　　4 Program transplantation and system testing

　　After the development of the human-machine interface and various functional modules is completed, the application needs to be transplanted. ActiveSync 6.1 can connect PCs with desktop Windows and WinCE devices. It can be used to create a synchronization relationship between mobile devices and PCs using serial ports, USB ports, Ethernet or infrared connections. In this project, the USB port is selected to establish a connection, which requires the installation of the USB driver under the BSP first. After the connection is established, the compiled application is downloaded to the customized WinCE 6.0 system, and the application can be run in the embedded WinCE 6.0 system. The functions of the pulse/data generator include diversified triggering, clock generation, pulse generation, controllable pulse parameters, controllable signal delay, serial data generation and other functions. The friendly and concise human-machine interface implemented by embedded software programming is shown in Figure 3. Field tests show that the software is easy to operate, and there is no obvious hysteresis in the interface refresh when using functions to generate data. It has a certain robustness and can effectively handle user misoperations. Figure 4 shows the pulse waveform output by the output channel of the pulse/data generator when the frequency is set to 50 MHz and the pulse width is set to 1 ns.

　　5 Conclusion

　　This paper combines WinCE 6.0 embedded system to develop a pulse/data generator software implementation plan, and realizes the pulse/data generator interface design, embedded application program transplantation, data communication between upper-layer software and underlying hardware, etc. After actual testing and operation, the developed pulse generator software platform runs stably, the interface is simple and beautiful and easy to operate, the upper-layer application software is fully functional, and the system's real-time response capability meets the design requirements of the instrument.