Design of Extended EEPROM Based on SM320F2812 SPI Bus

EEPROM (Electrically Erasable Programmable Read-Only Memory) is a storage chip that does not lose data after power failure. In practical applications, in order to keep the program unified and use different parameters in the program, EEPROM can be used for extended storage, and the required data can be stored in EEPROM. When the system is powered on and starts working, the parameters are first read from EEPROM, and then the application is executed. This article uses ATMEL's EEPROM memory AT25010 and TI's 2000 series DSP TMS320F2812 to achieve data erasing and storage. AT25010 uses a standard SPI bus interface, so it can be connected to DSP through a simple design to achieve hardware connection.

1. AT25010 Introduction

AT25010 is a serial peripheral interface erasable memory launched by ATMEL, with 1KB (128*8) byte capacity and power-off data retention function, mainly used in low voltage and low power consumption applications.

2. Introduction to the SPI interface of TMS320F2812

TMS320F2812 is a 32-bit fixed-point DSP launched by TI, mainly used in the control field. The DSP main frequency can be set by software, up to 150MHz, and it integrates rich resources internally, which can greatly simplify the design of peripheral circuits.

The serial peripheral interface (SPI) of TMS320F2812 is a high-speed synchronous serial input/output port with programmable communication rate and communication data length. It is usually used for communication between DSP processors and external peripherals and other processors.

The SPI interface has a 16-level receive and transmit FIFO, which can reduce the CPU overhead during operation.

3. Hardware Design

In order for the DSP to correctly write and read data from the EEPROM, the hardware needs to be correctly configured.

The SPI module of the TMS320F2812 processor has four external pins, namely, the SPI slave output/master input pin SPISOMI, the SPI slave input/master output pin SPISIMO, the SPI slave transmit enable pin SPISTE, and the SPI serial clock pin SPICLK. The hardware interface circuit between AT25010 and TMS320F2812 is shown in Figure 1. In Figure 1, the SPISTE pin of the DSP is connected to the chip select signal pin CS of the AT25010, so that the DSP can control whether to select the chip; the SPISOMI pin of the DSP is connected to the data output pin SO of AT25010 to receive the data sent by AT25010; the SPISIMO pin of the DSP is connected to the data output pin SI of AT25010 to send data to AT25010; the SPICLK pin of the DSP is connected to the serial clock pin SCK of AT25010 to provide a clock signal to AT25010 so that it can keep synchronization with the DSP. The write protection pin WP (Write Protect) controls whether data can be written to it. When this pin is set to a high level, the DSP can write or read data to the AT25010 chip; when this pin is set to a low level, the DSP can only read data from the AT25010 chip, but cannot write data to it. When designing the circuit, the WP pin of the AT25010 is pulled high through a resistor.

4. Software Design

Before the DSP starts writing and reading data from AT25010, it is initialized according to the design requirements. The settings for TMS320F2812: first, turn off the maskable interrupt, set the interrupt mask register, turn on the system SPI clock enable, and allow the SPI serial peripheral interface to work normally. Secondly, the DSP initializes AT25010 by sending data. When the DSP needs to write data to AT25010, it sends a write control instruction to AT25010, and controls the clock synchronization signal and chip select enable signal to write data to the specified address; when the DSP needs to read data from AT25010, it sends a read data control instruction to AT25010 to read data from the specified address.

4.1 SPI Initialization

To initialize the SPI module, you need to open the system's SPI enable register, set the SPI baud rate, and configure the SPI data send module register, data receive module register, status control register, and FIFO register to meet normal system operation requirements.

4.2 AT25010 Settings

When DSP needs to read the data at the specified address of AT25010, it must follow the following sequence. After the chip select pin CS is pulled low to select the AT25010 chip, the "read instruction" must be sent to AT25010 first, and then the address data is sent. If DSP has finished reading the data, the chip select pin CS is pulled high.

When the DSP needs to write data to the specified address of AT25010, it must also be executed in a certain order. First, it must confirm that the write protection pin WP is high, and then confirm that the address to be written is not locked. When writing data, the DSP first sends a write enable signal WREN to AT20501. Then the write operation can be performed. After the chip select pin CS is pulled low to select the AT25010 chip, the 8-bit address and 8-bit data are sent by the DSP to the AT25010 chip respectively, and the data is written to the specified address. After the AT25010 chip is set, page writing can be performed, and a large amount of data can be written at one time to save system resources. 4.3 Program Design

The programming architecture for reading data is as follows:

SpiaRegs.SPITXBUF=0×0300; //Send read instruction SpiaRegs.SPITXBUF=(Addr《8); //Send the address bit of the data to be read SpiaRegs.SPITXBUF=0×0000; //Send an empty instruction val=SpiaRegs.SPIRXBUF; //Read the data at the specified address The program design architecture for reading data is as follows:

SpiaRegs.SPITXBUF=0×0200; //Send write instruction SpiaRegs.SPITXBUF=(Addr《8); //Send the address bit of the data to be written SpiaRegs.SPITXBUF=(Data《8); //Send the data to be written SpiaRegs.SPITXBUF=0×0400; //WRDI5. Data writing and reading experiment.

As shown in Figure 2.

Write software code to experiment with writing and reading data from DSP to AT25010.

Since AT25010 is a 1KB memory, DSP can only write 128 8-bit data to AT25010 at most. Set a 9-bit array in the software, assign values ​​from 0×11 to 0×99, and use 9 address bits from 0 to 8. DSP uses a cyclic sending method to send the data in the array to the memory chip.

Then the DSP performs a read operation, reads data from the address bit of the memory chip, writes it into another array, and compares the read and written data to check whether the data is correct. The result is shown in Figure 3.

As can be seen from Figure 3, the data read and written are exactly the same. For systems with large amounts of data, a larger memory can be replaced, and the hardware design and program design in this article can also meet the requirements.

6. Conclusion

This design uses the SPI interface of the DSP chip for hardware design, which saves design time, reduces the complexity of circuit design, realizes the storage of data after the system is powered off, and can solve the problem of program consistency caused by different data. This design meets the requirements of the system and is suitable for various embedded systems that need to save data after power failure.