How to maximize energy saving of multimedia mobile phone processors

　　As high-data-rate infrastructure continues to expand around the world and multimedia devices become more prevalent, multi-function phones are being used almost all the time, just like voice-based phones, but rely on battery capacity. Consider all the functions that users can currently perform on their devices, such as downloading/sharing/listening to music, downloading/sharing photos, playing games, watching movies and TV shows and making restaurant reservations over the Internet, which is becoming a 24/7 lifestyle, requiring devices to have longer operating time to support it.

　　User experience is important to end users, but network operators and content providers also rely on these new multimedia features and their expanded services to generate revenue, so limited battery life means limited revenue.

　　The current power conversion efficiency is over 90%, and further improvement in efficiency will have little impact on the overall performance. Therefore, it is necessary to adopt new technologies for system-level energy management. If the processor can adjust the frequency according to actual needs, combined with power management technology that can reduce the voltage according to the frequency, it can significantly reduce energy consumption and extend the operating time accordingly.

　　Voltage Regulation

　　The concept of voltage regulation and energy saving can be expressed by the energy consumption formula of digital system:

　　E={(CVDD2f)+(VDDILEAK)}t

　　Here the dynamic terms include C (circuit capacitance), VDD (supply voltage), and f (clock frequency); the static terms are determined by ILEAK (leakage current) of the digital gate circuit. This equation shows why the use of common energy-saving techniques in digital circuits can ultimately reduce energy consumption by reducing the frequency (f) and voltage (VDD) of the processing engine. Dynamic voltage scaling (DVS) and adaptive voltage scaling (AVS) are two common voltage scaling techniques. Figure 1 shows the energy savings achieved by DVS and AVS.

　　What are DVS and AVS?

　　DVS is an open-loop approach that adjusts voltage and frequency by pre-characterization clipping or by utilizing a voltage-frequency lookup table. These voltages must be high enough to maintain functionality across all devices and temperature ranges. While this open-loop approach can save considerable energy, it does not achieve all possible energy savings.

　　AVS is a closed-loop solution that minimizes the supply voltage while still completing tasks in a timely manner. DVS regulates the supply voltage to a fixed, pre-characterized value, ignoring process, temperature, and power supply variations. AVS takes all of these factors into account when determining the optimal supply voltage to ensure that energy consumption is minimized.

　　Figure 1: Comparison of energy savings achieved by DVS and AVS technologies in fixed voltage operation mode.

　　How AVS works

　　AVS is a system-level solution that can independently and automatically control the power supply voltage of each processing engine in the SoC, thereby reducing the energy consumption of digital SoC solutions. AVS embeds a synthesizable core compatible with the Advanced Microcontroller Bus Architecture (AMBA) and an Advanced Power Controller (APC) in the SoC, as shown in Figure 2.

　　APC enables the system to implement dynamic voltage scaling or fully adaptive voltage scaling on the target SoC. APC reduces power requirements while maintaining peak efficiency by interacting with the power delivery system to ensure that the supply voltage is minimized at the current SoC clock frequency, thereby minimizing digital logic energy consumption.

　　The APC connects to the rest of the system using three interfaces: an AMBA-compatible host interface, a clock management unit (CMU) interface, and an open standard PowerWise interface (PWI). The host interface is used to control and configure the APC2, while the CMU interface is used to coordinate voltage and frequency changes.

　　PWI is a simple and fast (up to 15MHz) two-pin serial interface designed specifically to meet AVS and DVS requirements and has a wide range of programming options to accommodate multi-purpose applications. The latest PWI 2.0 standard supports multiple SoCs and peripherals on the same bus. The PWI interface is used to communicate power management information with an external energy management unit (EMU) or to control other peripherals.

　　Conclusion

　　With the emergence of more and more media content and high-speed data rates, how to process multimedia mobile phones at high speed while saving energy to extend battery life is becoming a challenge. Advanced power management technologies such as AVS can significantly reduce the energy consumption of digital processing, thereby extending the operating time of the device and enhancing the user experience. With these advanced energy-saving technologies, there is no need to charge the battery every few hours, extending the phone's talk time, game time or video time. Therefore, these technological advances allow us to enjoy more mobile services.