Proper selection of input network components is critical to the balance of the drive and input networks of high-speed ADCs (see application note: "Proper Selection of Input Networks to Optimize Dynamic Performance and Gain Flatness of High-Speed ​​ADCs").

　　In higher IF applications, the location of the termination resistor is very important. The AC-coupled input signal can be terminated on the primary or secondary side of the transformer, depending on the system requirements for high-speed ADC gain flatness and dynamic range. Wideband transformers are a common component that can convert single-ended signals to differential signals over a wide frequency range, providing a fast and convenient solution.

　　Primary side termination

　　This article uses the MAX1124 (Maxim's recently introduced 250MHz, 10-bit high-IF ADC) as an example to discuss different termination architectures and their impact on high-speed ADC gain flatness and dynamic range. Let's first take the primary-side termination circuit as an example (Figure 1a). The signal source with an impedance of 50Ω is applied to the primary side of the ADT1-1WT transformer. The secondary side of the transformer is connected to the MAX1124 input filter network (10Ω isolation resistor + ADC input impedance) through a 0.1µF AC coupling capacitor. No additional input filter capacitors are required on the INP and INN pins. In this configuration, the transformer primary side can be well matched, and the equivalent ADC input impedance of the transformer secondary side is 4kΩ /3pF. The unbalanced secondary impedance and the leakage inductance of the transformer will form a resonant circuit, resulting in a gain peaking frequency in the frequency range of 450MHz to 550MHz (Figure 1b).

Figure 1a

Figure 1b

　　Secondary side termination

　　To eliminate gain peaking when driving differential inputs, we removed the primary-side termination resistors and used secondary-side termination, applying a 50Ω source impedance to the ADT1-1WT. In this case, the secondary-side termination requires two 25Ω resistors connected at the top/bottom and center taps (Figure 2a). The matching resistors are followed by 0.1µF AC coupling capacitors and an input filter network (15Ω series resistor + ADC input impedance) to achieve a well-balanced signal on the secondary side and applied to the ADC input. Similar to the configuration in Figure 1, there are no additional input filter capacitors on the INN and INP pins. This termination eliminates gain peaking in the 450MHz to 550MHz band. If necessary, the 15Ω isolation resistors can be replaced with 30Ω to increase DC attenuation. Although this termination method can achieve a flatter frequency response, it loses bandwidth (Figure 2b).

Figure 2a

Figure 2b

　　in conclusion

　　This application note discusses the importance of properly selecting passive components in the design of input networks for high-speed data converters, and the importance of properly using these components. For example, if the system has very strict requirements for gain flatness, it is necessary to avoid imbalance and resonance at the converter's differential input to ensure the system's dynamic performance.

　　In both configurations, no filter capacitors are used at the input, which will introduce additional noise at the INP and INN pins. From a simple analysis, the signal-to-noise ratio (SNR) will drop by 0.2dB to 0.5dB. In most high-IF ADC applications, it is critical to ensure gain stability (gain flatness) and dynamic range over a wide frequency range. For a 10-bit resolution data converter, a less obvious degradation in noise performance can be accepted.