AMC1204 Application Guide

summary

This article first briefly introduces PMU, which helps readers understand the basic functions and selection methods of PMU. Secondly, it mainly describes some difficult-to-understand parts in the LP3925 data sheet, such as the settings of multi-function input and output ports, which helps readers better understand the flexibility and configurability of LP3925 and deepen their understanding of LP3925. In addition, it introduces some precautions in the actual use of LP3925 and solutions to some common problems, which can help readers avoid some problems that may be encountered in actual use in the early stage of design and shorten the debugging time.

Understanding Power Management Unit ( PMU)

What is PMU

PMU is a chip that generally integrates several power supplies required by the electronic system, thereby simplifying the power supply design of the system and meeting the needs of system miniaturization;

It can be said that PMU has developed along with the complexity of power requirements and miniaturization needs of electronic systems. Today, the scope of PMU not only covers small power systems integrating several DC/DCs and LDOs, but also covers relatively complete power management systems integrating many other functions (such as chargers, analog-to-digital converters, comparators, real-time clocks RTC, etc.).

Basic considerations for PMU selection

For PMU, the most basic function is to supply power to the electronic system, so the first thing to look at is the power supply capacity and timing, such as DC/DC, the number of LDOs and current driving capabilities, the default output voltage settings and power-on and power-off timing, etc., whether they can meet the system requirements.

Secondly, look at the auxiliary functions required by other systems, such as whether battery charging management, ADC, RTC, comparator, etc. are needed. 

Of course, the more complex the PMU is or the more comprehensive its functions are, the better it is. Considering various factors such as system wiring, heat dissipation, and debugging time, the PMU that best meets the system requirements is the most suitable.

LP3925 Introduction

LP3925 Introduction

LP3925 is a very flexible full-featured PMU that can adjust the power supply voltage and timing, and can power TD-SCDMA mobile phone systems or other application processor platforms.

LP3925 integrates 3 high-performance 800mA output current Buck converters. The 4MHz operating frequency can support the application of small-size 1uH inductors. Two of the Bucks can support DVS (dynamic voltage scaling) function. The startup and shutdown timing can be adjusted as needed during production (the specific adjustment range can be referred to datasheet Page 24, additional configuration options).

• Integrates 15 LDOs, including 10 general low-noise LDOs, 3 WILO (wide input low output) LDOs, 1 USB LDO and one low output current LDO;
• Integrated linear charge management unit with 1.2A power route function and supports 28V OVP;
• Integrates an RTC module with 2 alarms, 2 comparators and 2 TCXO buffers, 12-bit ADC, backup battery charge management, etc.
• Can support battery-free startup.

Several key points in the LP3925 datasheet :

Buck/LDO and other functional modules enable control (datasheet pages 13 and 25 ):

For each functional module, there is a corresponding 4-bit register value to control its enable. These corresponding registers can be found on page 13 of the datasheet. After knowing the register address, we can see how to set the values ​​of these registers. The table on page 25 of the datasheet contains detailed enable signal control modes. The table on page 25 can be understood as a lookup table. For the control mode required, find the corresponding register value in the table.

First, the register bits corresponding to each functional module can be found on page 13, and the register addresses range from 0x37 to 0x41.              

Table 1: Power enable control mode selection register (datasheet page 13 )

Secondly, the 4-bit value of the corresponding register controls the enabling mode of the corresponding module. The definition of the specific value can be found in the table on page 25.

Table 2: Register 0x37-0x41 control signal lookup table (datasheet page 25 )

Taking LDO1 as an example, the control methods of each module are introduced below: On page 13, you can see that the control method of LDO1 corresponds to the lower 4 bits of register 0x37. The values ​​of these 4 bits range from 0H to FH. LDO1 has different control methods: for example, 0H means that LDO1 is always off; 2H means that the enable or disable of LDO1 depends on the value of bit0 of register 0x00. If bit0 of register 0x00 is 0b, LDO1 is off; if bit0 of register 0x00 is 1b, LDO1 is enabled; 8H means that the enable of LDO1 depends on the level of Enable1; 9H means that the enable of LDO1 depends on the level of Enable2; the source of Enable can be seen in the introduction of multi-function pins below. By analogy, the control methods of other functional modules can be derived.

Multi-function pins :

The table on page 26 of the datasheet contains the detailed definition of the multi-function pins. For each multi-function pin, there is a corresponding 4-bit register value to control its actual function. The table on page 26 can also be understood as a lookup table.

First, the corresponding register bits of each multi-function pin's function definition can be found on page 13, and the register addresses are from 0x19 to 0x23.

Secondly, the 4-bit value of the corresponding register controls the actual function of the corresponding multi-function pin. The correspondence between register value and function can be found on page 26.

The following takes OSC_32KHz as an example to introduce the actual functions of each multi-function pin. On page 13, you can see that the function control of OSC_32KHz corresponds to the lower 4 bits of register 0x19. The values ​​of these 4 bits range from 0h to Fh. OSC_32KHz has different functions: for example, 0h means OSC_32KHz is in high impedance state; 1h means OSC_32KHz is a digital output pin opposite to the PWR_ON pin level signal; 2h is the output pin of comparator 1; 4h is the Enable1 signal; 5h is the DVS control signal of Buck1, 7h is the input pin of ADC1; 8h-Fh are 32KHz clock output pins.

Table 3: 0x19-0x23 multi-function pin function control register (datasheet page 13 )

Table 4: Register 0x19-0x23 multi-function pin function lookup table (datasheet page 26 )

Charge management constant current to constant voltage mode conversion

In common descriptions, the conversion voltage from constant current to constant voltage is usually described as the battery's charge cut-off voltage. However, in actual chip design, the detection point of the charge voltage is often not placed on the battery pin. In this way, during the charging process, due to the internal resistance of the charger, there will be some difference between the voltage at the detection point and the voltage on the battery pin. This results in the charger switching from constant current to constant voltage mode before the voltage on the battery pin reaches the charge cut-off voltage during actual testing. The following figure is an optimization of the figure on page 32 of the datasheet to help better understand

Figure 1 : Charge management voltage - current curve

Current sink settings :

There are three current sinks integrated in LP3925. Sink1 can absorb a maximum current of 250mA, and Sink2/3 can absorb a maximum current of 100mA.

• The average current of the current sink can be set by registers 0x22 bit7:4, 0x23, 0x42 bit5:3 and 0x52-0x54.
• When using a current sink, you must first set the maximum current of the current sink, which can be set in register 0x22 bit7:4, 0x23. Each current sink is set with 4 bits 0H to FH. The specific corresponding current can be found on page 27 of the datasheet. For example, if 0x22 bit7:4 is FH, it means that the maximum current that can be absorbed by current sink 1 is set to 250mA;
• The second is to set the PWM duty cycle of the current sink. The difference between the LP3925 and the commonly used current sink is that the LP3925 does not control the current by directly setting the PWM duty cycle, but can get the average duty cycle through some conversion.
• First, the time is divided into 9 large cycles, and each large cycle contains 7 small cycles. It can be understood that the time is divided into 63 time slots. When setting the PWM code, it is filled into these 63 time slots;
• Registers 0x52 to 0x54 bit5:0 set current sinks 1/2/3 respectively. Register values ​​0 to 63 correspond to 63 time slots. When the register is 0, the current sink is off, and when the register is 63, all current sinks are on.
• The specific method of filling the time slot is as follows:

Figure 2 : Current sink duty cycle setting

LP3925 Application Notes :

Layout Notes:

For detailed layout considerations, please refer to the datasheet. Here are some design points:

For buck:

• The current to the load flows through the output capacitor;
• The ground of the input and output capacitors and the GND pin of the buck need to have a good ground connection. Among the three, the ground of the input capacitor and the ground pin of the buck are more important and need to ensure the minimum return path; at the same time, connect to the main ground through as many vias as possible;
• When the ground of the input and output capacitors of the same buck and the buck ground are very close, you can use a star connection to the main ground; but when they are not very close, first ensure that they are connected to the main ground as quickly as possible;
• The input capacitor needs to be close to the VINB pin, and the output capacitor needs to be close to the inductor;
• The SW connection line needs to be as thick and short as possible;
• The feedback line of the Buck needs to be pulled back from the output capacitor to the chip, not from the inductor. In addition, the feedback line needs to be as far away from the SW line as possible. If it cannot be kept away, try to cross the SW line. The feedback line should preferably be protected by a ground wire or ground plane.
• For the capacitor ground and buck ground of different bucks, try to use unused vias to connect to the main ground, especially the ground of the output capacitor, to prevent mutual interference between bucks;

For LDO:

• Compared with the capacitor and inductor of the buck, the input and output capacitors of the LDO are not so demanding;
• For LDO, when conditions permit, the input and output capacitors should be placed as close to the input and output pins as possible, with input capacitors taking priority.
• The LP3925’s general purpose LDO incorporates innovative technology to support the use of output remote caps.
• When the LDO output is within 10cm and the load end is already connected to a capacitor of 1uF or more, the output capacitor close to the LDO output pin can usually be omitted.

Application points of each functional module

Buck Converter

Generally speaking, the buck is the part that is more susceptible to interference and generates interference, firstly because there are many small signals inside it, and secondly because it has a 4MHz switch, which is easy to generate interference. In order to reduce interference, first of all, the layout needs special attention. The precautions for layout can refer to the previous section. Secondly, it is recommended to add anti-interference solutions in the design. Adding magnetic beads between the output of the buck and the load is a very effective way to reduce interference.

Figure 3 : Buck output structure diagram

Current sink

Generally speaking, current sinks can be used to drive keyboard backlight LEDs, LCD backlight LEDs or vibration motors. However, it should be noted that current sinks cannot drive large inductive loads (such as winding resistors used for testing).

Real-time clock ( RTC ) power supply

The RTC part of LP3925 is powered by the VCOIN pin. When the backup battery is over-discharged, even if the main battery is added to the system, the VCOIN pin voltage may still be lower than the normal minimum operating voltage of the RTC (1.9V). When the PMU is turned on, if the voltage of the VCOIN pin is lower than 1.9V, the LP3925 will lock the real-time clock and the direct communication interface of IIC, causing the system to be unable to communicate with the real-time clock part. To solve this problem, a resistor of about 47Kohm can be added between the backup battery and the VCOIN pin, and the voltage of the VCOIN pin can be kept above 2V through the 50uA backup battery charging current, ensuring that the RTC part of the system can work normally under any backup battery voltage.

Figure 4 : Backup battery connection circuit

Charger module​

The charging management module of LP3925 supports the application of current path management, that is, when the output load capacity of the external charger (AC adapter or USB input) is sufficient, the charging management will first meet the system's current demand, and then meet the battery's charging demand. The benefit of this function is that it can reduce the frequent charging and discharging of the battery, and can try to meet the battery's charging current stability. In addition, the current path management also supports the separation of the VDD and VBATT branches, so that when the battery is over-discharged, the system can still start up at a low battery voltage. In order to meet the battery charging current as stable as possible, it is recommended that the output capacity of the external charger is larger than the required battery constant current charging current, preferably more than 300mA. In the register of LP3925, the current set by IDCIN should also be more than 300mA larger than the current set by IBATT. When the current output load capacity of the external charger is relatively low (such as 500mA) and the battery constant current charging current is required to be relatively high, and there is no way to ensure the 300mA current difference, the parameter settings of IDCIN and IBATT need to be carefully optimized. During debugging, you can first set the target IDCIN to the rated current of the external charger, and set IBATT to be 50mA smaller than IDCIN. Then, gradually reduce the IDCIN and IBATT currents until you find the target IDCIN and IBATT values ​​that allow the system charging to work stably.

in conclusion:

LP3925 is a fully functional and flexible PMU that can meet the power requirements of a variety of mobile phone platforms. With appropriate software and hardware design, it can greatly reduce product development time and achieve rapid market demand. In addition, LP3925 has been mass-produced on multiple TD-SCDMA mobile phone platforms such as LC1808 of Leadcore Technology, and is a mature power management unit.