High-frequency DC/DC converter design challenges and solutions

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DC/DC converters are being designed to run at higher and higher frequencies in order to reduce the size of the output capacitors and inductors to save board space. As a result, more and more DC/DC converters are now available on the market that operate at high input voltages, provide line transient protection, and lower duty cycles that make it difficult to achieve lower voltages at faster frequencies. Many power integrated circuit manufacturers ( ICs ) are actively marketing high-frequency DC/DC converters, claiming that they can reduce board space. A DC/DC converter running at 1MHz or 2MHz may seem like a good idea, but the impact of switching frequency on a power system goes far beyond size and efficiency. This article presents several design examples that illustrate some of the benefits and challenges of switching at high frequencies.

Application Selection

To illustrate the tradeoffs of using high switching frequencies, three separate power supplies were designed that operate at 100, 300, and 750 kHz. For all three designs, the input voltage was 48V, the output voltage was 5V, and the output current was 1A. These requirements are common for powering a 5-V logic USB or a medium-frequency universal 5-V bus used by other DC/DC converters , such as low-dropout regulators. To establish some design constraints, the allowed ripple voltage was selected to be 50mV, which is about 1% of the output voltage, and a peak-to-peak inductor current of 0.5A was selected. The Texas Instruments TPS54160, a 2.5-MHz, 60-V, 1.5-A step-down DC/DC converter with integrated MOSFETs, was used as the regulator for all designs. The TPS54160 features external compensation and fast programmable frequency, making it suitable for some high-input-voltage industrial applications.

Inductor and capacitor selection

The inductor and capacitor are selected for each case according to the following four simplified formulas:

Inductor Selection

(1a)

can be rewritten as:

(1b)

Where D (duty cycle) = 5 V/48 V = 0.104, and ΔI = 0.5 A peak-to-peak.

Capacitor Selection

I = C x dv/dt (2a)

can be rewritten as:

(2b)

Where ΔI = 0.5 A peak-to-peak and ΔV = 50 mV.

For Equation 2b, we assume that the equivalent series resistance (ESR) of the chosen capacitor is negligible, as is the case with ceramic capacitors. Ceramic capacitors were chosen for all three designs due to their low resistance and small size. The multiplier of 2 in the numerator of Equation 2b accounts for the DC bias-dependent capacitance drop, as this effect is not accounted for in most ceramic capacitor datasheets.

Figure 1 TPS54160 reference schematic

The circuit shown in Figure 1 was used to evaluate the performance of each design on the bench. Some components without values ​​in the schematic were modified in the design. The output filter consists of L1 and C2. The component values ​​for all three designs are listed in Table 1 and were chosen based on the results of equations 1a through 2b. Note that the DC resistance of each inductor decreases with increasing frequency. This is because fewer turns require less copper length. The error amplifier compensation components were designed separately for each switching frequency. The calculation method for selecting the compensation values ​​is beyond the scope of this article.

Minimum "on" time

The minimum controllable "on" time limit is a characteristic of DC/DC converter ICs and is the narrowest achievable pulse width of the pulse width modulation ( PWM ) circuit. In a buck converter, the percentage of time that the power MOSFET is on during the switching cycle is called the duty cycle, which is equal to the ratio of the output voltage to the input voltage. Using the TPS54160 converter, the duty cycle is 0.104 (4 V/48 V), while the minimum "on" time listed in the datasheet is 130 ns. The controllable pulse width limit results in a minimum achievable duty cycle, which can be easily calculated by multiplying the minimum "on" time by the switching frequency. Once the minimum duty cycle is known, the minimum achievable output voltage can be calculated by multiplying VIN by the minimum duty cycle. The minimum output voltage is also limited by the converter reference voltage, which is 0.8V using the TPS54160.

In this example, we can generate a 5-V output voltage with a 750-kHz switching frequency (see Table 2). However, if the frequency is 1 MHz, the lowest possible output voltage is limited to about 6 V; otherwise, the DC/DC converter will skip pulses. The alternative is to reduce the input voltage or the frequency. Before choosing a switching frequency, it is best to check the DC/DC converter data sheet to see the guaranteed minimum controllable "on" time.

Pulse Jump

Pulse skipping occurs when a DC/DC converter cannot clear the gate drive pulses quickly enough to maintain the ideal duty cycle. The power supply will try to regulate the output voltage, but the ripple voltage will increase due to the pulses that are farther apart. Due to pulse skipping, the output ripple will exhibit subharmonic components, which may present noise issues. The current limiting circuit may also no longer function properly because the IC may not respond to large current peaks. In some cases, the control loop may become unstable if the controller is not functioning properly.

Efficiency and Power Consumption

The efficiency of a DC/DC converter is one of the most important attributes to consider when designing a power supply . Low efficiency translates into high power dissipation, which requires a separate heat sink or more copper on the printed circuit board ( PCB ) to handle. Power dissipation also places higher demands on the components upstream of the power supply. As shown in Table 3, there are several components to power dissipation.

The significant loss components for all three examples are FET drive losses, FET switching losses, and inductor losses. FET resistance and IC losses are consistent because the same IC is used in all three designs. Capacitor losses are negligible because low ESR ceramic capacitors were chosen for all examples. To show the effect of high frequency switching, the efficiency of each example was measured and displayed in Figure 2. The figure clearly shows that the efficiency decreases as the switching frequency increases. To improve efficiency at all frequencies, it is necessary to find a DC/DC converter with low drain-to-source "on" resistance, low gate charge, or low quiescent current specification at full load; or find some capacitors and inductors with lower equivalent resistance.

Table 1 Capacitor and inductor selection for three example power supply designs

Table 2 Minimum output voltage for 130-ns minimum “on” time

Table 3 Power consumption components

Figure 2. Efficiency of the TPS54160 at three example frequencies

Component size

Table 4 lists the total board area required for the three designs, as well as the pad area for the capacitors and inductors. The recommended pad area for the capacitor or inductor is slightly larger than the individual components themselves, and this area is used for all three design examples. The area occupied by each component is added together (which includes the pad size of the IC, the filter, and any other small resistors and capacitors), and then the result is multiplied by 2 (to account for component spacing) to get the total area. There is a total area savings of nearly 250 mm2 between the 100-kHz and 750-kHz designs, resulting in a 50% smaller filter and a 55% reduction in board space. However, there are diminishing returns because capacitor and inductor values ​​cannot be reduced to zero! In other words, pushing the frequency higher and higher does not always reduce the total size because you cannot always find inductors and capacitors that fit these sizes and are mass-produced on the market. Note that the 33-µH and 15-µH inductors occupy the same area. This is possible because the 33-µH inductor is 3.5 mm tall, while the 15-µH inductor is only 2.4 mm tall. The point we want to illustrate through these two inductors is that inductance is directly proportional to volume.

Table 4 Component size and total area requirements

Figure 3 Bode plots of 100kHz, 300kHz and 750kHz

Transient response

Transient response is a good indicator of the performance level of a power supply. We use Bode plots of each power supply to show how high switching frequencies compare (see Figure 3). As shown, the phase margin of each power supply is between 45° and 55°, which shows that transient response is well suppressed. The crossover frequency is approximately 1/8 of the switching frequency. When using fast switching DC/DC converters, designers should ensure that the power supply IC error amplifier has sufficient bandwidth to support the high crossover frequency. The unity gain bandwidth of the TPS54160 error amplifier is typically 2.7 MHz. Table 5 shows the actual transient response time and the associated values ​​of the voltage peak overshoot. The higher the switching frequency, the lower the overshoot value due to the wider bandwidth.

Table 5 Transient response

Table 6 Ratio of jitter to “on” time at small duty cycle

Jitter Considerations

At high conversion ratios and higher frequencies, noise becomes an issue. When choosing a high switching frequency, designers should consider jitter and the minimum “on” time of the DC/DC converter. When the duty cycle is small, the jitter noise becomes a larger percentage of the switching pulse. Table 6 shows the ratio of jitter to “on” time for a 48-V to 5-V conversion ratio. We assume a 0.5-V diode drop and 20-ns jitter on this phase node.

in conclusion

There are many tradeoffs when designing high-frequency switching converters. Some of the advantages described in this article include smaller size, faster transient response, and less voltage overshoot/undershoot. These advantages come at the expense of lower efficiency and more heat dissipation. However, there are also many pitfalls in the process of pushing the performance limit, such as pulse skipping and noise issues. Before selecting a wide input voltage DC/DC converter for a high-frequency application, we should first check the manufacturer's data sheet to understand some important specifications, such as: minimum "on" time, error amplifier gain bandwidth, FET resistance, and FET switching losses. ICs that perform well within these specifications are expensive, but they are worth the price and are easier to use when designers are worried about how to deal with a difficult design problem.

Reference address:High-frequency DC/DC converter design challenges and solutions

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