Quick 8-bit high-speed AD converter circuit and principle introduction

Function of the circuit

High-speed 8-bit AD converters are used to process video broadband signals or in high-speed circuits.

UPD6950C is a fast ADC composed of C-MOS circuits, with a conversion rate of 15MSFS. The analog signal is read in about 30NS, and the data is latched by the next clock pulse. The working power supply is unipolar +5V, and the power consumption is 400MW, which is a fast and low-power device.

How the Circuit Works

The IC is of shortcut type, consisting of 256 voltage comparators, a resistor divider circuit to generate a reference voltage, and a 256-8-bit encoder or 8-bit data latch.

The AD conversion principle is very simple. A few of the 256 comparators are connected for conversion, and the number can be translated into 8-bit digital data by the decoder.

The reference voltage is applied to both ends of the resistor divider circuit, and its voltage range is 2.5V~VDD-1 (V). The internal resistance is 1.5K, so a current of 1.6~2.6MA flows through the voltage divider resistor.

If the reference voltage is 2.56V, the average voltage of 1LSB is 10MV, which is easy to understand intuitively. This circuit uses a shunt regulator, and the reference voltage can be adjusted in the range of about 2.5~3.75V.

Since the internal reference of TL431 C is about 2.5V, the reference voltage cannot drop below 2.5V, so the input voltage range for AD conversion is 0V~reference voltage. In measurement, sometimes it is required to input a voltage of 0~5.0~10V, so an attenuator is added to the input end, and a 1/3.9 voltage divider is used when 0~10V, that is, R1=2.9R2.

To make this circuit work, an external clock pulse must be added, and the highest clock frequency can reach 15MHZ. Attention should be paid to the timing of data: the first clock cycle is used for AD conversion, the second clock cycle is used to store the converted data in the 8-bit data register, and then a clock cycle is delayed to obtain the converted data. This timing is suitable for continuous, such as trigger conversion, which requires two clock pulse signals.

Photo A shows the output of the least significant bit and the most significant bit of the continuous conversion with a clock frequency of 10MHZ. The data corresponding to the clock pulse position is the data converted in the previous clock cycle, so 10NS+33NA is the actual conversion time, but the conversion time is usually still 33NA.

When the input voltage is lower than the reference voltage, the "OVER" terminal is at an "H" level, and the data bits are also set to an "H" level.

Assembly Notes

In high-voltage circuits, how well it is assembled will directly affect the performance of the circuit. To prevent the input signal line from coupling with the logic line, the layout range of the circuit board ground line should be large, and the analog part and the digital part should be separated. In the circuit diagram, the analog part is on the left side of the AD converter, and the digital part is on the right side. Pay attention when assembling the circuit. This circuit uses a 5V unipolar power supply, so pay close attention to the analog and digital grounding.