Synchronous Rectification to Implement Flyback Converter Design

The working principle of the synchronous rectifier flyback converter and the working principle of the drive circuit are analyzed in detail . On this basis, a synchronous rectifier flyback converter with 100V~375VDC input and 12V/4A output is designed. It works in the current discontinuous mode and the control chip is UC3842. The design process is discussed in detail. The correctness of the principle analysis is verified by Saber simulation, which proves that the converter has a high conversion efficiency.

Introduction

The flyback converter has the advantages of simple circuit, input and output voltage isolation, low cost, and less space requirements, and has been widely used in low-power switching power supplies . However, when the output current is large and the output voltage is low, the secondary rectifier diode of the traditional flyback converter has large conduction loss and reverse recovery loss, and the efficiency is low. Synchronous rectification technology uses a dedicated power MOSFET with extremely low on-state resistance to replace the rectifier diode. Applying synchronous rectification technology to the flyback converter can greatly improve the efficiency of the converter. 1 Principle of synchronous rectification flyback converter The rectifier diode on the secondary side of the flyback converter is replaced by a synchronous rectifier tube SR to form a synchronous rectification flyback converter. The basic topology is shown in Figure 1(a). To achieve synchronous rectification of the flyback converter, the primary MOS tube Q and the secondary synchronous rectifier tube SR must work in sequence, that is, the conduction time of the two tubes cannot overlap. When the primary MOS tube Q is turned on, SR is turned off and the transformer stores energy; when the primary MOS tube Q is turned off, SR is turned on and the transformer transfers the stored energy to the load. The driving signal timing is shown in Figure 1(b). In the actual circuit, in order to avoid the primary MOS tube Q and the secondary synchronous rectifier tube SR being turned on at the same time, there should be a delay between the turn-off time of Q and the turn-on time of SR; similarly, there should be a delay between the turn-on time of Q and the turn-off time of SR.






2. Drive of Synchronous Rectifier

The drive of SR is an important issue of synchronous rectification circuit and needs to be reasonably selected. This paper adopts discrete components to form the drive circuit. The drive circuit has a simple structure and low cost, and is suitable for converters with a wide input voltage range. The specific drive circuit is shown in Figure 2. The gate drive voltage of SR is taken from the output voltage of the converter, so the output voltage of the synchronous rectification converter using this drive circuit must meet the SR gate drive voltage requirements.


The basic working principle of the drive circuit: The current transformer T2 is connected in series with the secondary synchronous rectifier SR in the same branch to detect the current of the SR. When current flows through the body diode of the SR, a current is induced on the secondary side of the current transformer, which is converted into a voltage through R1. When the voltage value reaches and exceeds the forward voltage of the emitter junction of the transistor Q1, Q1 is turned on. When the diode VD conduction voltage is reached, VD is turned on to clamp it. After the transistor Q1 is turned on, the output voltage drives the SR to turn on through the totem pole output circuit. When the sampling voltage of the current in the SR on the secondary side resistor R1 of the current transformer drops below the conduction threshold of Q1, Q1 is turned off and the SR is turned off. The functions of the components of the synchronous rectifier drive circuit in the figure are as follows: SR is a synchronous rectifier, which is used to replace the rectifier diode ; T2 is a current transformer, which is used to detect the current passing through SR. When current flows through the body diode of SR, current is induced on the secondary side of the current transformer; R1 is used to convert the current induced on the secondary side of the transformer into voltage . At the same time, the value of R1 determines the current on the secondary side of the current transformer when the synchronous rectifier is turned on and off; C1 and diode VD are used to filter and clamp the voltage on the secondary side of the transformer; bias resistor R2, pull-down resistor R3 and transistor Q1 form a switching circuit, and the saturation cutoff of Q1 is used to realize the conduction and shutdown of the synchronous rectifier SR; Q2 and Q3 form a totem pole output circuit, which provides a large enough current to quickly increase the voltage between the gate and source of SR to the required value, ensuring that SR can be turned on quickly. At the same time, it provides a reverse current extraction loop when SR is turned off to accelerate SR turn-off. 3 Design of synchronous rectification flyback converter The circuit of synchronous rectification flyback converter is shown in Figure 3. The control chip is UC3842. The design technical indicators are as follows: Input voltage Ui: 100~375VDC Output voltage Uo: 12V Output current Io: 4A Switching frequency fs: 100KHz Maximum duty cycle Dmax: 0.45 Efficiency: η>80% Working mode: intermittent mode


































3.1 Startup circuit design

The startup voltage of chip UC3842 is 16V. Before the chip is turned on, the current consumed by the chip is less than 1mA. After normal operation, the undervoltage lockout voltage is 10V, the upper limit is 34V, and the chip consumes about 15mA. At startup, the input DC voltage charges

capacitor C2 through the startup resistor R4 . The chip consumes less than 1mA current. The voltage on capacitor C2 continues to rise. When the voltage on pin 7 of the chip rises to 16V, UC3842 starts to work. The chip consumes about 15mA current, the voltage on capacitor C2 drops, and the auxiliary winding begins to have voltage. The voltage on capacitor C3 gradually increases. When the voltage on capacitor C3 is higher than the voltage on capacitor C2, diode VD2 is turned on and powered by the auxiliary winding. The auxiliary winding power supply voltage is 15V, the voltage ripple requirement is not high, and the filter capacitor C3 is 47μF. In order to ensure reliable startup of the chip , the capacitor C2 is 100μF and the resistor R4 is 68KΩ. When the input voltage is minimum, a startup current of 1.2mA can be provided through the startup resistor R4 . 3.2 Transformer design The flyback converter operates in DCM, but as the input voltage decreases or the load current increases, the duty cycle increases and may change from DCM to CCM. Therefore, in order to ensure that the flyback converter operates in DCM and the duty cycle does not exceed the required maximum value within the entire input voltage and load current variation range, the transformer is designed to meet the flyback converter when the input voltage is minimum Ui = 100V, the load current Io = 4A and the efficiency η = 80% The current critical continuous mode, and the duty cycle does not exceed the required maximum value Dmax = 0.45. The EI type ferrite core is selected, and its model is EI30. In order to reduce the leakage inductance, the transformer is wound by sandwich winding. The primary inductance is 146.85μH, and the turns ratio of the transformer is:









The primary winding Np is wound with a single strand of copper wire with a diameter of 0.56mm, the secondary winding Ns is wound with three strands of copper wire with a diameter of 0.56mm, and the auxiliary winding Na is wound with a single strand of copper wire with a diameter of 0.56mm.

3.3 RCD clamping Circuit Design When the switch tube Q is turned off, the energy in the primary inductance Lp will be transferred to the secondary output, but the energy in the leakage inductance Ll will not be transferred to the secondary, but transferred to the capacitor Cc of the clamping circuit, and then this part of the energy is consumed by the clamping resistor Rc. The voltage on the capacitor Cc rushes up at the moment the switch tube is turned off, and then it is always in a discharge state. The value of the capacitor Cc should be large enough to ensure that the ripple of the voltage uc(t) across itself is small enough when absorbing the leakage inductance energy and releasing the energy. Therefore, the voltage uc(t) across the capacitor Cc is basically a constant value Uc. At the same time, the voltage on the capacitor Cc cannot be lower than the reflected voltage Uo × (Np / Ns) from the secondary to the primary, otherwise the diode will be turned on during the switch off period , and the RCD clamping circuit will become a load of the converter. Therefore, the peak voltage borne by the switch is clamped to:




The maximum input voltage is Uimax, the maximum withstand voltage of the switch is Udsmax, and considering the 80% derating factor, the voltage Uc across the capacitor Cc can be determined by formula (1).


The energy stored in the leakage inductance is completely consumed by the resistor Rc, so the value of the resistor Rc can be determined by formula (2).


In order to ensure that the voltage ripple across capacitor Cc is small enough, RcCc>Ts is required. Taking the relationship of 10, the size of capacitor Cc is determined by formula (3).


The FQPF5N60 field effect tube produced by Fairchild Corporation of the United States is selected. The maximum current allowed to pass through the tube is 5A, and the maximum withstand voltage is 600V; the leakage inductance is 3% of the primary inductance of the transformer, 4.5μH. In the RCD clamping circuit, R c is taken as 6KΩ, Cc is 0.015μF, and VDc uses a fast recovery diode FR107.

3.4 Current detection circuit design

The primary inductor current is converted into a voltage by inserting a sampling resistor RS with a ground reference in series with the source of the switch Q. This voltage is monitored by the current sampling input terminal (pin 3) and compared with the output level from the error amplifier. Under normal working conditions, the peak value of the primary inductor current is controlled by the output U e of the error amplifier, satisfying: the clamping voltage at the reverse input terminal of the current detection comparator is 1V, so the peak value of the primary inductor current is limited to:




Take RS as 0.33Ω, and use R and C to form a small filter between RS and pin 3 to suppress the current spike generated when the power tube is turned on. Its time constant is approximately equal to the duration of the current spike (usually several hundred nanoseconds). Take R as 1KΩ and C as 470pF.