Using innovative logic technology to reduce power consumption in mobile designs

Current mobile designs strive to balance power-rich functionality with the need for longer battery life. This article will explore how mixed voltage levels increase ICC supply current and how logic gates reduce power consumption in mixed voltage powered mobile designs.

Low ICCT technology is beneficial for energy saving

Most portable devices today have multiple power rails, but variable power consumption may still occur when the input high level (VIH) is lower than the supply voltage (VCC). CMOS generally has very low static ICC and leakage current when the input voltage is at the supply rail level (VIL = Gnd or VIH = VCC), making it the technology of choice for logic devices in mobile applications. However, if VIH < VCC, a situation occurs where both the PMOS and NMOS transistors in the input stage may be "on" at different stages, conducting current, and during this state, the static current ICC increases, with a path from VCC to Gnd. This increased current is called the ICCT current, which is the supply current when the input voltage approaches the threshold. Figure 1 depicts this situation.

Figure 1 Logic gate and input voltage conditions

Note: * The ideal state for using CMOS gate circuits is when the input voltage is equal to the power supply voltage Vcc; at this time, the ICC current is extremely low.

*In mixed voltage conditions, if Vin < VCC, ICCT current appears and power consumption occurs.

Typically in CMOS gate designs, the input voltage threshold or input switching point is VCC/2; however, Fairchild Semiconductor's low ICCT gates use a proprietary input voltage design that reduces the input threshold voltage and increases the input voltage range without affecting the effective logic low level VIL. As mentioned earlier, CMOS gates consume very little power when the input voltage is 0V or VCC, and the product data sheet usually states the ICC under this condition. Therefore, system designers may be surprised to see an increase in ICC current when the VIH value is less than VCC. Figure 2 shows the benefits of a redesigned input structure.

The VIN - ICC graph compares a standard CMOS input device (red line) and a low ICCT input device (blue line). Quiescent power is determined by the basic DC power formula: P = ICC * VCC. In this example, with an input VIH of 2.5V, the power dissipated by the standard CMOS gate input is equal to 3.0mW (3.6V x 0.83mA), while the power dissipated by the low ICCT gate is only 0.003mW (3.6V x 0.99uA); that is, the static power consumption is reduced by 100% using the Low ICCT device.

Figure 2 ICC -VIN input curve (Vcc = 3.6V, VIN = 2.5V)

The increase in ICC current is very important because it will significantly increase the static power consumption of the device. Fairchild Semiconductor's proprietary low ICCT input structure can limit the range of ICCT current during its occurrence, as shown in Figure 2.

Table 1 Energy saving potential under different VIH conditions

Table 1 compares the ICCT supply current levels under different VCC/VIN conditions. As can be seen from the table, Fairchild Semiconductor's low ICCT gate circuit has great energy saving potential. In mixed voltage systems, the power consumption associated with logic gate circuits can be reduced to negligible by using low ICCT gate circuits.

See Table 2 for a list of low ICCT gates available. Additional functionality is available as needed. When existing applications experience excessive power consumption due to the input conditions discussed previously, the user can easily drop in a replacement using the standard pinout.

Table 2 Fairchild Semiconductor's NC7SVL low ICCT gate circuit

Summarize

The key to extending battery life is to reduce power at all levels. As portable devices integrate more functions, power consumption becomes more and more of a concern. Fairchild Semiconductor's NC7SVL low ICCT TinyLogic product provides a cost-effective solution to these challenges. In addition, Fairchild Semiconductor's advanced small-size MicroPak packaging technology, as well as the newly introduced smaller 1.0x1.0mm MicroPak 2 packaging technology, can significantly reduce board space requirements.

For portable applications with tight power budgets, increased power consumption is unacceptable. The NC7SVL low ICCT gate circuit can help system designers stay within the power budget and extend battery life.