Power module design analysis and strategy

Publisher:MysticalWhisperLatest update time:2011-09-10 Source: 互联网 Reading articles on mobile phones Scan QR code
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Power modules are power supplies that can be mounted directly on a printed circuit board (see Figure 1). They can provide power to application-specific integrated circuits (ASICs), digital signal processors (DSPs), microprocessors, memories, field-programmable gate arrays (FPGAs), and other digital or analog loads. Generally speaking, these modules are called point-of-load (POL) power supplies or point-of-use power supplies (PUPS). Due to the many advantages of modular structures, various modules are widely used in high-performance telecommunications, networking, and data communication systems. Although there are many advantages to using modules, engineers often ignore reliability and measurement issues when designing power modules and most on-board DC/DC converters. This article will explore these issues in depth and propose relevant solutions for each.

Figure 1, Power supply

Advantages of using power modules

Currently, different suppliers have launched a variety of different power modules on the market, and the input voltage , output power, functions and topology of different products are different. The use of power modules can save development time and enable products to be launched on the market faster, so power modules are better than integrated solutions. Power modules also have the following advantages:

● Each module can be rigorously tested individually to ensure its high reliability, including power-on testing to eliminate substandard products. In contrast, integrated solutions are more difficult to test because the entire power supply system is closely linked to other functional systems on the circuit.

● Different suppliers can design modules of the same size according to existing technical standards, providing engineers designing power supplies with a variety of different options.

● Each module is designed and tested in accordance with standard performance requirements, helping to reduce the risks of adopting new technologies.

● If an integrated solution is used, once a problem occurs in the power supply system, the entire motherboard will need to be replaced; if a modular design is used, only the problematic module needs to be replaced, which helps save costs and development time.


Easily overlooked power module design issues

Although modular design has the above advantages, modular design and on-board DC/DC converter design also have their own problems. Many people do not know enough about these problems or do not pay enough attention to them. The following are some of them:

● Measurement of output noise;

● Design of magnetic system;

● Breakdown phenomenon of synchronous buck converter;

● Reliability of printed circuit boards.

These issues are discussed below, along with a number of simple techniques for addressing them.

Output Noise Measurement Techniques

All switching-mode power supplies will have output noise. The higher the switching frequency, the more important it is to use the correct measurement technique to ensure that the measured data is accurate and reliable. When measuring output noise and other important data, the Tektronix probe probe (commonly called a cold nozzle probe) shown in Figure 2 can be used to ensure that the measurement numbers are accurate and reliable and meet predictions. This measurement technique also ensures that ground loops are minimized.

Figure 2. Measured output noise figures

When making measurements we also need to factor in the propagation delays that may occur in the measuring instruments. Most current probes have a greater propagation delay than voltage probes. Therefore, measurements that require the display of both voltage and current waveforms cannot guarantee accurate measurement numbers unless the different delays are manually equalized.

The current probe also inputs the inductance into the circuit. A typical current probe inputs an inductance of 600nH. For high-frequency circuit design, since the circuit can only withstand an inductance of 1mH, the inductance input through the probe will affect the accuracy of the di/dt current measurement and even cause a large error in the measurement number. If the inductor is saturated, another more accurate method can be used to measure the current, for example, we can measure the voltage of a small shunt resistor in series with the inductor .

Magnetic design


Whether the magnetic core is reliable is another issue that is often overlooked. Most output inductors use iron powder cores because iron powder is the lowest cost material. About 95% of the composition of the iron powder core is pure iron particles, and these iron powder particles are bonded together using organic adhesives. These adhesives also separate each iron powder particle, making the core full of air permeable space inside and outside.

Iron powder is the raw material for the core, but it contains small amounts of impurities such as manganese and chromium, which can affect the reliability of the core, depending on the amount of impurities. We can use a spectroscopic electron microscope (SEM) to carefully examine the cross section of the core to determine the relative distribution of impurities. The key to the reliability of the core is whether the material is predictable and whether its supply is stable and reliable.

If the iron powder core is exposed to high temperature for a long time, the core loss may increase, and once the loss increases, it can never be restored because the organic binder decomposes molecularly, increasing eddy current loss. This phenomenon is called thermal aging, which may eventually lead to thermal runaway of the core.

The magnitude of core loss is affected by many different factors such as AC flux density, operating frequency, core size and material type. For example, in high-frequency operation, most of the loss is eddy current loss. In low-frequency operation, hysteresis loss is the largest loss.

Eddy current losses heat up the core, which in turn affects efficiency. Eddy current losses occur when a ferromagnetic object is affected by different magnetic fluxes at different times, which causes a continuous current to circulate in the object . Eddy current losses can be reduced by using thin ferromagnetic sheets instead of solid ferromagnetic sheets as the core material. For example, Metglas, which is wound with magnetic tape, is such a core. Other ferromagnetic product suppliers such as Magnetics also produce magnetic cores wound with magnetic tape.

Core suppliers such as Micrometals provide engineers who design magnetic products with the latest information and calculation methods on core thermal aging. Iron powder cores with inorganic binders will not experience thermal aging. Such cores are already available on the market, and Micrometals' 200C series cores are one of these products.


Synchronous Buck Converter Breakdown

Point-of-load power supplies (POL) or point-of-use power supplies (PUPS) are widely used in power supply systems such as synchronous buck converters (Figure 3). This synchronous buck converter uses high-side and low-side MOSFETs to replace the clamping diodes of traditional buck converters to reduce the load current loss.

Figure 3. Synchronous buck converter

Engineers often overlook the problem of "shoot-through" when designing buck converters. "Shoot-through" occurs whenever both the high-side and low-side MOSFETs are fully or partially activated at the same time, allowing the input voltage to deliver current directly to ground.

Shoot-through causes a current spike at the moment of switching, which prevents the converter from operating at full efficiency. We cannot use a current probe to measure shoot-through because the probe inductance will seriously interfere with the operation of the circuit . We can check the gate/source voltage of the two field effect transistors (FETs) to see if there is a spike. This is another way to detect shoot-through. (The gate/source voltage of the upper MOSFET can be monitored differentially.)

We can use the following methods to reduce the occurrence of breakdown.

One possible solution is to use a controller chip with a "fixed dead time" . This controller chip ensures that there is a delay after the upper MOSFET is turned off before the lower MOSFET is turned on again. This method is relatively simple, but it must be implemented with caution. If the dead time is too short, it may not prevent the breakdown phenomenon. If the dead time is too long, the conduction loss will increase because the diode built into the bottom FET is always turned on during the dead time. Since this diode conducts during the dead time, the efficiency of the system using this method depends on the characteristics of the built-in diode of the bottom MOSFET.

Another way to reduce shoot-through is to use a controller chip with an “adaptive dead time.” The advantage of this approach is that the gate/source voltage of the upper MOSFET is constantly monitored to determine when to enable the bottom MOSFET.


When the high-side MOSFET turns on, it causes a dv/dt spike on the gate of the low-side MOSFET through the inductor, which pushes up the gate voltage (Figure 4). If the gate/source voltage is high enough to turn it on, breakdown will occur.

Figure 4. Amplitude of dv/dt-induced voltage level appearing on the low-side MOSFET

The adaptive dead-time controller monitors the gate voltage of the MOSFET externally. Therefore, any additional external gate resistor will divide the voltage of the controller's internal pull-down resistor, so that the gate voltage will actually be higher than the voltage monitored by the controller.

Predictive gate drive is another possible solution, which uses digital feedback circuits to detect the conduction of the built -in diode and adjust the dead time delay to minimize the conduction of the built-in diode and ensure the highest efficiency of the system. If this method is adopted, more pins need to be added to the controller chip , which increases the cost of the chip and the power module.

One thing to note is that even with predictive gate drive, there is no guarantee that the FET will not turn on due to inductive dv/dt.

Delaying the start of the high-side MOSFET also helps reduce the shoot-through. While this method can reduce or eliminate shoot-through, the downside is higher switching losses and reduced efficiency. Choosing a better MOSFET also helps reduce the dv/dt inductor voltage swing that appears at the bottom MOSFET gate. The higher the ratio between Cgs and Cgd, the lower the inductor voltage that appears at the MOSFET gate.

Shoot-through is often overlooked as a condition during load transients, especially when the load is removed or reduced suddenly, when the controller generates narrow-frequency pulses. Most high-current systems today use multiphase designs that use driver ICs to drive the MOSFETs. But using driver ICs can complicate the shoot-through problem, especially when the load is transient. For example, interference from the narrow-frequency drive pulses, combined with propagation delays in the driver, can cause shoot-through conditions.

Most driver chip manufacturers specify that the pulse width of the controller must not be lower than a certain minimum requirement. If it is lower than this minimum requirement, no pulse will be input to the gate of the MOSFET .

In addition, manufacturers also add a programmable dead time (TRT) function to the driver IC to enhance the accuracy of the adaptive switching timing. This is done by adding a programmable dead time resistor between the programmable dead time pin and ground to determine the dead time during the high-side and low-side transitions. This dead time setting function plus the propagation delay can turn off the complementary MOSFET during the transition to prevent shoot-through in the synchronous buck converter.

reliability

Any module must be rigorously tested at an early stage to ensure that the design is sound and reliable, so as to avoid unexpected problems in the final stages of the production process. The module must be tested in the customer's system to ensure that all relevant factors that may cause system failure, such as cooling fan failure, intermittent cooling fan pauses, etc. are fully considered. Engineers who use decentralized structures hope that the designed system can be used continuously for many years with few or no failures. Since test figures show that the MTBF of power modules is as high as several million hours, it is not difficult to achieve this goal.

But what is often overlooked is the reliability of printed circuit boards. According to the current trend, the area of ​​​​printed circuit boards is getting smaller and smaller, but the amount of current that needs to be handled is getting larger and larger. Therefore, the increase in current density may cause hidden or other through-holes to fail to perform their normal functions.

Some hidden vias on the printed circuit board must transmit a large amount of current. For these hidden vias, there must be enough copper guards around them to protect them to ensure a more reliable and durable design. This guard can also suppress the thermal expansion of the z-axis. Otherwise, once the ambient temperature of the printed circuit board changes during the production process and when the product is used, the hidden vias will be exposed. Engineers must refer to the professional opinions of printed circuit board manufacturers and thoroughly review the design of the printed circuit board. Printed circuit board manufacturers can provide professional opinions on the reliability of printed circuit board design based on their production capabilities.

Summarize

If we want to use power modules to build a reliable power supply system, we must solve the problem of design reliability. The above article focuses on several major issues, including the reliability of iron powder cores, the characteristics of magnetic systems, the breakdown phenomenon of synchronous buck converters, and the reliability of printed circuit boards in high current systems.


Reference address:Power module design analysis and strategy

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