Second Generation Digital Capacitive Isolators Set New Standards for High Performance

Although digital isolators have replaced analog isolators, thus simplifying the design of isolated interfaces , designers are now challenged by the growing need for high system performance. High performance here does not only refer to high data rates and/or low power consumption, but also to high reliability. On the one hand, this need is met by robust data transmission in harsh industrial environments. On the other hand, and especially for isolators, this is addressed by a long service life.

Recent technological advances in chip design and manufacturing have resulted in second-generation digital capacitive isolators whose high performance defines new standards for low power consumption and high reliability. This article will introduce their functional principles and internal structure and discuss their current consumption and expected lifetime.

Functional principle

Figure 1 shows the internal block diagram of a digital capacitive isolator (DCI). The isolator input is divided into two differential signal paths: one high data rate channel (called AC-channel) and the other low data rate channel (called DC-channel). The AC-channel transmits signals between 100kbps and 100Mbps, while the DC-channel covers the range from 100kbps to DC.

Figure 1: Internal block diagram of a digital capacitive isolator.

High-speed signals are processed by the AC channel, where the signal is first converted from single-ended mode to differential mode and then differentiated into many transients by the capacitor-resistor network of the isolation layer. The subsequent comparator converts these transients into differential pulses, thereby setting and resetting a "NOR" gate trigger. The trigger output equivalent to the original input signal is fed to the decision logic (DCL) and the output multiplexer. The DCL includes a watchdog timer that measures the duration between signal conversions. If the duration between two consecutive conversions exceeds the timing window (such as in the case of low-frequency signals), the DCL instructs the output multiplexer to switch from the AC-channel to the DC-channel.

Since low-frequency signals require large-capacity capacitors that make on-chip integration difficult, the input to the DC-channel has a pulse-width modulator (PWM). This modulator modulates the low-frequency input signal with a high-frequency carrier from an internal oscillator (OSC). The modulated signal is processed in the AC-channel in the same way as the high-frequency signal. However, before submitting the signal to the output multiplexer, a final low-pass filter (LPF) is used to remove the high-frequency PWM carrier to restore the original, low-frequency input signal.

A key advantage of capacitive isolators over other isolator technologies is that their DC-channels maintain the correct input polarity at the isolator output during power-up and loss-of-signal (LOS) events. Other isolator technologies that lack these features typically experience output glitches during power-up or remain at the last input polarity before the signal is lost.

Internal structure

Figure 2 shows a simplified block diagram of the internal structure of a single-channel, capacitive isolator. Internally, the isolator consists of two chips: a transmitter and a receiver chip. The actual isolation barrier is provided by high-voltage capacitors on the receiver chip.

Since both the AC-channel and the DC-channel use a differential signaling technique to provide high noise immunity during data transmission, four isolation capacitors are necessary to form a single isolated data channel.

Figure 2: Internal structure of a single-channel capacitive isolator.

The right side of Figure 2 shows a cross section of a high-voltage capacitor. Bond wires coming from the transmitter chip connect to the aluminum top plate of the receiver-side capacitor. The bottom plate (also aluminum) connects to the receiver logic. Between the plates is an interlayer dielectric, which is a 16-μm-thick layer of silicon dioxide (SiO2).

There are two benefits to using SiO2 as the interlayer dielectric: first, it is one of the most stable isolation materials with minimal aging effects, so the expected lifetime of the capacitive isolator far exceeds that of other technologies; second, SiO2 can be processed using standard semiconductor manufacturing technology, which greatly reduces production costs.

Another advantage of capacitive isolation is the ultra-low capacitance of 123 femtofarads (123x10-15F) per capacitor, allowing very high data rate transmission and enabling microcapacitor geometries for multi-channel isolators.

Current consumption

The isolator current consumption is highly dependent on the internal structure. Compared to the dual-channel isolators, the inductive isolator appears to have the lowest DC supply current (see Figure 3). This is because the device contains only 2 signal channels. However, the capacitive isolator contains 4 channels: 2 AC channels and 2 DC channels. Therefore, its DC current consumption is higher, and its reliability is also higher because it ensures the correct output polarity in the event of input signal loss.

DC current flows when the system is idle. Fortunately, industrial data acquisition systems, PLCs, and digital analog I/O modules are not designed for systems to be idle. Their purpose is to transfer data from sensors to control units and from control units to actuators. These tasks must be completed quickly, reliably, and continuously.

Generally speaking, dual-channel isolators are used in isolated CAN and RS-485 bus nodes, where only 2 data lines (transmit and receive) require isolation. For example, RS-485 transceivers must be able to provide up to ±70mA of drive power in some extreme common-mode conditions to meet the standard. In this way, the difference between DC currents can be ignored even at low data rates.

Figure 3: Current consumption of capacitive and inductive isolators (dual-channel isolator on the left, quad-channel isolator on the right).

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Compared to the four-channel isolator, the results are improved. The number of channels is doubled, so the current consumption of the inductive isolator is also doubled, whereas the number of channels of the four-channel capacitive isolator is only one more than that of the two-channel isolator. This is due to the fact that only one DC-channel is used, which is multiplexed between the four AC-channels (see Figure 4). While the DC channel still has high reliability, the total current consumption is kept to a minimum, resulting in only a minimal increase over the two-channel version.

Figure 4: Channel structures of dual-channel and quad-channel capacitive isolators.

Four-channel isolators are used to isolate interfaces (such as SPI) that include data and control lines, and their data rates are generally 20 to 80Mbps. The current consumption difference between inductive and capacitive isolators is already more than 10mA at 30Mbps, and this difference can be as high as 40mA at higher data rates such as 100Mbps.

Therefore, it is not really the DC current that is important, but the current increase at the data rate, i.e. the slope Δi/Δf.

Estimated service life

The expected lifetime of an isolator is determined by time-dependent breakdown (TDDB), a significant failure mode for dielectric materials such as silicon dioxide. Dielectrics degrade over time due to impurities and imperfections introduced by manufacturing. This degradation is accelerated by the electric field applied across the dielectric and by the rise in its temperature.

The estimated service life is based on the TDDB E-model, a widely recognized dielectric breakdown model.

In practice, TDDB is determined by the applied stress voltage of the isolator while the ambient temperature is maintained at 150oC (see Figure 5). A timer is activated at the beginning of the test and stops when the isolator current exceeds 1mA, indicating dielectric breakdown. The failure time is recorded for each test voltage and plotted against the theoretical E-model curve.

Figure 5: TDDB test methodology.

The TDDB curves shown in Figure 6 show that the test data (over a period of 5 years) for the capacitive isolator exactly matches the E-model prediction, resulting in an estimated lifetime of 28 years at a working voltage of 400 Vrms (560 Vpk), while the estimated lifetime of the inductive isolator at the same voltage is less than 10 years. The TDDB curves also show that between 700 V and 2.5 kV, the capacitive isolator lifetime is approximately 10 times longer than the inductive isolator.

Figure 6: Estimated lifetime of capacitive and inductive isolators.

If the industrial estimated service life of 10 to 30 years is to be achieved, capacitive isolators using SiO2 dielectric are the only viable solution to achieve this goal.

Conclusion

Digital capacitive isolators have excellent performance due to their high reliability, low current consumption, high bandwidth and long service life. TI offers a wide range of digital capacitive isolators, including isolated bus transceivers and the new generation of ISO74xx capacitive isolators.