Design of CAN Intelligent Node Based on AT91RM9200

In recent years, industrial measurement and control systems have shifted from traditional centralized measurement and control systems to networked distributed control systems. With the rapid development of fieldbus technology and the continuous improvement of standardization, open distributed measurement and control systems based on fieldbus technology have been widely used. The bus is the controller area network (CAN), which belongs to the fieldbus category. It is a serial communication network that can effectively support distributed control. It can connect intelligent devices connected to the fieldbus as network nodes into a network system and further form a distributed measurement and control system. The CAN intelligent node is located at the site where the sensor and actuator are located, and plays a connecting role in the distributed control system. On the one hand, it must communicate with the host computer to complete data exchange; on the other hand, it completes the measurement and control functions according to the needs of the system. Therefore, the design of the CAN intelligent node plays a very important role in the industrial distributed measurement and control system. This paper will propose a design scheme for a CAN intelligent node based on the ARM9 processor AT91RM9200 and the CAN controller MCP2510, and introduce the software and hardware design and debugging methods of the scheme.

1 Hardware Design

The design of CAN intelligent node involves two aspects: the functions to be realized and how to realize CAN communication. Therefore, the design framework of CAN intelligent node proposed in this paper based on AT91RM9200 and MCP2510 is shown in Figure 1. Firstly, the characteristics of the main chips are introduced, and then the design principle of intelligent node is explained.

1.1 Chip Characteristics

AT91RM9200 is an ARM9 processor produced by Atmel. It is a system built entirely around the ARM920T ARM Thumb processor. It has a wealth of system and application peripherals and standard interfaces, thus providing a single-chip solution for a wide range of low-power, low-cost, high-performance computer applications.

MCP2510 is a CAN protocol controller with SPI interface produced by Microchip Technology Inc., USA. It fully supports CAN bus V2.0A/B technical specifications; it can send and receive standard and extended messages, with a communication rate of up to 1 Mb/s, and has acceptance filtering and message management functions; it communicates with MCU through SPI interface, with a maximum data transmission rate of up to 5 Mb/s; it contains 3 transmit buffers and 2 receive buffers, and also has flexible interrupt management capabilities. All these features make it very simple for MCU to operate the CAN bus. PCA82C250 is a CAN transceiver produced by Philips Semiconductor, which is the interface between the CAN protocol controller and the physical transmission line. It can
transmit data on two bus cables with differential voltage at a bit rate of up to 1 Mb/s.

1.2 Design Principles

This article refers to the functions that the CAN intelligent node needs to implement as function modules. Since the AT91RM9200 processor has a wealth of system and application peripherals and standard interfaces, it is easy to expand the function modules according to the needs of the application. This article focuses on how the AT91RM9200 processor implements the expansion of the CAN bus.

The AT91RM9200 processor provides 4 SPI interfaces. Among them, the three pin signals of MOSI (master output slave input), MISO (master input slave output), and SPCK (serial clock) are shared by the four SPI interfaces; and the four chip select signals NPCSO, NPCS1, NPCS2, and NPCS3 are used to select the four SPI interfaces respectively. The SPI interface pins of the CAN controller MCP2510 are defined as: SI (data input), SO (data output), SCK (clock input), and CS (chip select input). This design connects the second SPI interface of AT91RM9200 with the SPI interface of MCP2510 (MOSI←→SI, MIS0←→SO, SPCK←→SCK, NPCS1←→CS), thus establishing a bridge for communication between them. At the same time, the interrupt output pin INT of the MCP2510 chip is connected to the interrupt input pin IRQ5 of the AT91RM9200 chip, so that the interrupt events generated by the MCP2510 chip (including sending, receiving, message error, bus activity wake-up, error, etc.) can be notified to the AT91RM9200 processor, allowing it to make corresponding processing.

The CAN controller MCP2510 can be directly connected to the CAN transceiver PCA82C250 through the serial data transmission pin (TXCAN) and the serial data reception pin (RXCAN). In order to achieve galvanic isolation between the MC-P2510 and PCA82C250, two optocouplers are placed between them. However, the use of optocouplers between the protocol controller and the transceiver usually increases the cycle delay of the bus node. The typical propagation delay of the optocoupler 6N137 is 60 ns, which is more suitable for medium and low-speed applications with a transmission rate of less than or equal to 125 Kb/s; in high-speed applications with a transmission rate of 125 Kb/s to 1 Mb/s, high-speed optocouplers with a propagation delay of less than 40 ns, such as HCPL-7101, should be considered.

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The CAN transceiver PCA82C250 is connected to the bus cable through two bus terminals CANH and CANL with differential transmission and reception functions. The input pin Rs of PCA82C250 is connected to ground through an external resistor Rext, and three different operating modes can be selected. The first is high-speed mode, which supports the maximum bus speed and/or length; the second is slope mode, whose output conversion speed can be deliberately reduced to reduce electromagnetic radiation; the third is standby mode, which is very suitable for battery-powered applications with very low power consumption. This design connects the pin RS of PCA82C250 to a resistor with a resistance value of 47 kΩ, so that it can work in slope mode, so that unshielded bus cables can be used, reducing system costs. However, the bus signal conversion rate is deliberately reduced, so this design can only be used in medium and low-speed applications with a transmission rate of less than or equal to 125 Kb/s, and the corresponding optocoupler can be selected as 6N137.

2 Software Design

CAN intelligent node software design mainly includes two aspects: CAN communication and CAN node function module software design. The implementation of CAN node function module software varies according to requirements and will not be introduced here. This article focuses on the design of CAN communication software, which mainly consists of three parts: CAN initialization, CAN sending data, and CAN receiving data.

2.1 CAN initialization

As shown in Figure 2(a), CAN initialization mainly includes PIOA port initialization, SPI initialization, MCP2510 initialization, and interrupt initialization.

They are introduced as follows:

(1) PIOA port initialization. Since each pin of AT91RM9200 can be configured as a general-purpose I/O line or an I/O line multiplexed with one or two peripheral I/Os, the PIOA port must be configured through software: define the PA0, PA1, PA2, and PA4 pins as MISO, MOSI, SPCK, and NPCS1 respectively, thereby completing the definition of the CAN intelligent node SPI interface; define the PA3 pin as IRQ5, thereby completing the definition of the CAN intelligent node interrupt signal.

(2) SPI initialization. Initialization through the PIOA port only completes the pin definition of the SPI interface. In order for the SPI interface to work properly, first configure the power management controller (PMC) to enable the SPI clock; if the SPI interrupt request is allowed, the advanced interrupt controller (AIC) must be configured; finally, through the SPI mode register SPI_MR. Specify SPI as host mode, fixed peripheral selection, SPI clock as MCK, and chip select signal NPCS1 valid; through the SPI chip select 1 register SPI_CSR1, specify the SPCK clock polarity and clock phase to support the (O, O) or (1, 1) SPI mode of MCP2510, specify the SPI interface to transmit 8-bit data to match the command and data format of MCP2510, and specify the SPI serial clock baud rate to match the communication with MCP2510.

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(3) MCP2510 initialization. After completing the initialization of the PIOA port and SPI, the MCP2510 can be initialized according to the process in the dotted box of Figure 2 (a): First, the MCP2510 must enter the configuration mode; then configure the relevant registers of the MCP2510 (bit timing configuration register, receive filter register, receive mask register, pin control and status register); finally, the MCP2510 enters the normal mode. According to the SPI command set provided by the MCP2510 (read instruction, write instruction, request to send instruction, status read instruction, bit modification instruction, reset instruction), the
corresponding functions can be implemented by operating the SPI receive data register SPI_RDR, SPI transmit data register SPI_TDR, and SPI status register SPI_SR of the AT91RM9200: McpRdByte(), Mcp-WrByte(), WriteRTS(), McpRdStatus(), BitModify(), McpReset(). The software completes the configuration of the relevant registers of the MCP2510 through these basic instruction functions.

(4) Interrupt initialization: Through the advanced interrupt controller (AIC) of AT91RM9200, first configure the IRQ5 interrupt priority to the highest and the interrupt trigger type to falling edge trigger; then set the address of the interrupt service routine IRQ5_ISR() to the interrupt vector register; finally, enable the IRQ5 interrupt.

2.2 CAN sends data

After the initialization of CAN is completed, the three transmission buffers can be used to send message data. As shown in Figure 2(b), before sending data, the message transmission is first terminated through the transmission buffer N (N=0, 1, 2) control register TXBNCTRL, and the priority of the message transmission of the transmission buffer N is set; then the standard identifier is set through the transmission buffer N standard identifier high and low registers TXBNSIDH and TXBNSIDL. If the message uses an extended identifier, the extended identifier must also be set through the transmission buffer N extended identifier high and low registers TXBNEID8 and TXBNEID0. After the relevant registers of the transmission buffer N are initialized, the transmission task is in a dormant waiting state. Once there is data to be sent, the data to be sent (up to 8 B each time) can be stored in the data registers TXBND7~TXlBND0 of the transmission buffer N, and the number of bytes to be sent each time is set through the data length register TXBNDLC of the transmission buffer N, and finally the data transmission is started through the transmission buffer N control register TXB-NCTRL. When the data is sent, the transmission task is in a dormant waiting state again.

2.3 CAN receiving data

After the CAN initialization is completed, the two receive buffers can be used to receive message data. As shown in Figure 2(c), before receiving data, the receive buffer N (N=0, 1) control register RXBNCTRL is first used to set the receive buffer working mode to receive all valid messages with extended identifiers or standard identifiers that meet the filtering conditions; if the MCP2510 is allowed to receive interrupts, the interrupt enable register CANINTE is also required to allow the receive buffer N to generate an interrupt when a message is loaded.

After the relevant registers of receive buffer N are initialized, the receive task is in a dormant waiting state. When the receive task finds that it needs to receive data through polling or interrupt methods, it obtains the standard identifier through the receive buffer N standard identifier high and low registers RXBNSIDH and RXBNSIDL; if the received message is an extended frame, the extended identifier can be obtained through RXBNSIDL and the receive buffer N extended identifier middle and low registers RXBNEID8 and RXBNEIDO; the number of received data bytes is obtained through the receive buffer N data length code register RXBNDLC, and then the data information in the received message is obtained through the receive buffer N data registers RBNDm7~RBNDm0. When the data is received, the receive task is in a dormant waiting state again.

3 Software and Hardware Debugging

When the hardware and software design of the CAN intelligent node is completed, it is necessary to debug the software and hardware to verify the correctness of the design. The software and hardware debugging of the CAN intelligent node is carried out in the following steps:

(1) Debugging the CAN self-transmitting and self-receiving functions: As long as the configuration of the relevant registers of the MCP2510 is completed during the CAN initialization process and the MCP2510 is set to loopback mode, the messages can be sent and received between the internal transmit buffer and the receive buffer of the MCP2510 device without passing through the CAN bus.

(2) Debugging of CAN communication function. Debugging of CAN communication function is performed according to the scheme shown in Figure 3. The USB_CAN adapter uses a GY8507 USB_CAN bus adapter with a USB interface and a 1-channel CAN interface from Wuhan Jiyang Optoelectronics Technology Co., Ltd. Through this adapter, the PC can connect to a standard CAN network through the USB interface to communicate with the CAN intelligent node. The CANTools tool software provided by the manufacturer can facilitate the sending and receiving debugging of CAN intelligent node data.

(3) CAN function module debugging: Since the functions implemented by CAN intelligent nodes vary, the debugging of CAN function modules will not be introduced in detail.

4 Conclusion

At present, the software and hardware design and debugging of the CAN intelligent node communication circuit have been completed, and the software has been successfully ported to the VxWorks 5.5 operating system. Based on the powerful AT91RM-9200 processor and the highly reliable and strong real-time VxWorks 5.5 operating system, it is easy to build a CAN intelligent node that meets application requirements.