Design of 384×288 uncooled infrared detector drive circuit

O Introduction

In recent years, uncooled infrared detectors and infrared focal plane arrays composed of multiple sensitive units have received more and more attention in the military and civilian fields. Uncooled infrared detectors work at room temperature, so they are also called room temperature infrared detectors. Compared with cooled infrared detectors, the biggest advantage of room temperature infrared detectors is that the system does not require a refrigerator and can work at room temperature. It has obvious advantages in low cost, low power consumption, miniaturization and reliability, and has shown huge market potential. UFPA is the core of the uncooled infrared thermal imaging system and determines the performance parameters and imaging quality of the system. In order to further improve the performance of UFPA, in addition to improving the process level, it is also necessary to design a high-quality, low-noise driving circuit to keep UFPA in the best working state to improve the imaging quality of the system.

1 Structure and working principle of UFPA

The 384×288 pixel uncooled infrared focal plane device used in this circuit is the amorphous silicon microbolometer UL03191 produced by ULIS . It mainly consists of a two-dimensional microbolometer array (FPA) and an internally integrated thermoelectric cooler (17EC). The thermoelectric cooler precisely controls the focal plane temperature to achieve a stable operating temperature. The ULO3191 has a compact housing, an image sensing area of ​​9.6 mm×7.2 mm, a weight of ≤25 grams, a pixel pitch of 25 μm, a maximum frame rate of 100 MHz, and one analog output and one digital output.

UL03191 uses pulse voltage bias to integrate infrared radiation line by line, and then converts the target's infrared radiation into a current signal; the readout circuit reads the pixel current signal point by point, and the capacitive feedback transconductance amplifier (C TI A) of the readout circuit converts it into a voltage signal, and finally the amplified signal is output line by line by the multiplexer.

2 UFPA drive circuit design

The key to the design of uncooled infrared detector driving circuit is to provide several bias voltages to meet the normal operation of the detector, provide timing pulses such as MC, INT and RESET, and provide interface signals for thermoelectric stabilizer and temperature loop control.

2.1 Design of bias voltage circuit

In order to ensure the normal operation of the uncooled infrared focal plane array, drive the readout circuit in the UFPA, ensure the thermoelectric stability of the detector, and make the UFPA have a large dynamic range and good NETD performance, the bias voltage circuit should have the characteristics of compact structure, stable performance, high precision, and strict protection measures.

This solution uses multiple LT1761-5 and LT1761-3.3 to obtain 5 V and 3.3 V respectively; LT1761-2.8 is used to obtain the 2.8 V voltage required for VBUS; GFID, VSK, and GSK all use LT1-761 to obtain their required voltage values ​​through shunt resistors.

2.2 Design of pulse voltage signal driving circuit

The detector operation involves more than one timing sequence, and several timing sequences require synchronization, so the most ideal method is to use a crystal oscillator source to generate the required timing pulses through a programmable logic device.

(1) MC (Master Clock) is the basis for the operation of the entire device. All operations are coordinated and unified under the control of MC. MC control registers perform pixel addressing. The frequency of MC cannot be higher than 384×288 MHz, and its duty cycle is 50%. The rise and fall time of MC must be less than 10 ns.

(2) Integration Phase (INT) is the signal that enables ULO3191 to integrate each row of pixels. When INT is high, it allows integration of a row of pixel signals from the microbolometer. INT must change state on the rising edge of MC and must be during the low level period of RESET signal.

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(3) The RESET signal can reset the UL03191, so that the UL03191 will start integrating from the first row of the detector's active area. The RESET signal must change state at the rising edge of MC, and the RESET signal cannot occur twice or more in one frame. The RESET signal duration is at least 1 times the MC time, and its falling edge must be before the falling edge of INT.

This scheme uses Xilix's CPLD device XC2C128 to provide the detector with clock signals, RESET, integral pulse INT and other signals. The CPLD provides a 6.75 MHz frequency clock for the MC by dividing the 27 MHz crystal oscillator by 4. The effective size of the infrared focal plane is 384×288, that is, 384 columns and 288 rows. The frame rate of the infrared image is taken as 50 Hz. The simulation diagram of the pulse timing is shown in Figure 3.

2.3 Design of temperature detection and control circuit

The "uncooled" of uncooled focal plane thermal imagers means that they can work at a constant room temperature, unlike low-temperature cooled thermal imagers whose working temperature is usually below 200 K. The temperature of the thermistor will directly affect the detection sensitivity and imaging performance of the thermal imager. Only by keeping the temperature of all pixels in the detector array at the same constant room temperature as much as possible can the detection sensitivity of the thermal imager be fundamentally improved and the work fluctuation caused by it be suppressed. Therefore, designing a high-precision temperature control system is the key to completing the design of high-performance uncooled focal plane thermal imagers.

This solution uses the ADN8830 temperature control chip from AD, which is one of the excellent single-chip, highly integrated, high-output efficiency, and high-performance TEC drive modules. The TEC current fluctuation noise is less than 0.5%, and the MOSFET is integrated on the chip to minimize the peripheral devices to improve the output efficiency. The highest setting switching frequency is 1 MHz, and the maximum output voltage protection can be set. The control principle of the ADN-8830 temperature control circuit is to compare the voltage on the thermistor with the temperature set by the normal operation of the sensor (corresponding to the voltage value), thereby adjusting the direction and size of the current flowing through the refrigerator to control the temperature.

The temperature setting input of ADN8830 is provided by 12-bit serial D/A converter AD7390, which stabilizes the detector at different operating points and expands the temperature range of the detector.

The bias resistor value of the ADN8830 input bridge should be calculated according to formula (1):

In formula (1), RT1 and RT3 represent the resistance of the thermistor at the upper and lower limits of the operating temperature, respectively, and RT2 is the value of the thermistor at the average temperature, that is, RT2=(RT1+RT3)/2.

The values ​​of RT1, RT2 and RT3 are obtained by consulting the thermistor temperature curve and then calculating the resistance value.

3 Conclusion

The driving circuit of the uncooled infrared focal plane array is an important part of designing the uncooled infrared focal plane imaging component. This paper uses CPLD to generate timing logic drive, the single-chip TEC chip ADN-8830 to control the temperature of UFPA, and combines the high-performance and low-noise bias circuit to construct the driving circuit of the uncooled infrared focal plane array device. The driving circuit developed according to this scheme has been tested and applied in practice. The results show that the circuit has achieved the ideal effect and has the characteristics of small size, good practicality and high reliability.