Logic Analyzer Provides Complete Solution for I2C Signal Measurement

　　The I2C bus is a very common bus in electronic products. Its advantage is that it only needs two lines to connect many ICs in parallel for control. However, due to the multi-device and open drain architecture, it is often difficult to troubleshoot the I2C bus. This article will present some practical application cases and use the various functions of the logic analyzer to help troubleshoot the problem.

　　Long-term data logging using transient storage

　　When an abnormality occurs in the I2C bus signal, it is often impossible to clearly know which device has failed. Therefore, it is impossible to locate the problem point by setting a trigger. Most users will consider capturing all the waveforms first and then slowly analyzing them. However, the logic analyzer basically captures signals in a sampling manner. Regardless of whether the signal changes or not, the memory will continue to be consumed as the sampling and capturing action proceeds. The transitional storage function is a waveform data storage mode that only stores waveform data when the waveform transitions. In this way, when the data does not transition, the logic analyzer can continue to wait and does not store any data in the memory. Compared with the practice of storing data once at each sampling point, transitional storage will be able to record more data. As the transmission speed of I2C is shown in Table 1, the overall speed is not very fast. Therefore, it is very suitable to use transitional storage to extend the storage time.

　　Using I2C trigger to locate the problem point

　　For example, the I2C bus on the circuit board connects device A and device B, but during the long burn-in test, an error occurs on the I2C bus. It is known that when an error occurs, an invalid address will appear on the I2C bus, and it will appear several times during the burn-in test. How can a logic analyzer be used to clarify the problem? For such a problem, it is actually difficult to capture all the waveform data. Because the time point and number of problems are very uncertain, and the burn-in test that lasts for several days also makes it impractical to log all the data, and it is necessary to find the problem point in a large amount of data. It is also a very time-consuming and laborious task.

　　Therefore, the I2C trigger function in the logic analyzer can be used for positioning. First, input the valid addresses of device A (Addr: 12h) and device B (Addr: 34h). Then let the logic analyzer find the addresses that do not meet the above two conditions. The actual setting is shown in Figure 1.

　　Then, with the automatic storage function after capturing the waveform with the logic analyzer, during the burn-in process, each time the trigger is successful, it will be saved, and then the trigger point of the saved waveform can be checked. Making good use of the I2C trigger function can quickly assist in waveform positioning, which is much more meaningful than capturing more data. Similarly, making good use of the entire I2C parameter as a trigger condition, such as address matching or data matching or multi-stage triggering to specify a more accurate trigger, these are functions that cannot be achieved by simply using the edge trigger (Edge Trigger).

　　Problems with I2C trigger check timing violation

　　The I2C bus will regulate SCL and SDA to be sent at the specified time, otherwise the behavior of the entire bus will be wrong, resulting in communication failure. Sometimes the actual waveform time has exceeded the specification, but it cannot be picked out during development and verification, because sometimes the time error is not large, so that the product can still be used normally. But often the problem will not break out until mass production, causing the mass production defect rate to rise. Even problems will not appear until the user has the product. These are all results that product development is not happy to see.

　　As shown in Figure 2, you can enable the logic analyzer's time violation check as a trigger condition, set the time value to be checked, and then let the logic analyzer help pick out the time violation. The logic analyzer system uses a 200MHz sampling rate for sampling. Therefore, the minimum time width that can be checked is 5ns. In this way, it can assist users to use triggers to perform time violation checks. This method is very suitable for detecting the signal time of the I2C bus during burn-in testing.