Design of the front end of the strain test system based on MAX1452

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In flight tests, testing the strain of an aircraft is very common and important, and is also an important basis for identifying the performance and safety of the aircraft itself. With the large increase in the number of strain parameters that need to be tested in aircraft flight tests and the development of airborne testing technology, my country's flight tests are using the current internationally advanced networked distributed test systems and test equipment to conduct aircraft tests. The requirements for the installation of equipment and acquisition accuracy of the aircraft itself require that the front-end acquisition module that the networked airborne test system needs to be mounted on has very small power consumption and volume, and can be installed relatively close to the part of the aircraft that needs to be tested. Traditional strain acquisition equipment generally uses a large number of discrete components for design, the independence of each channel is not strong, the noise of the acquisition circuit is relatively large, and there is no temperature correction function, which makes the accuracy of the collected strain parameters and other small signals not high. In addition, the size and power consumption of the equipment are relatively large, occupying the valuable space and power supply inside the aircraft. In response to the above problems, the highly integrated MAX1452 sensor conditioning chip of Maxim Company is used in the new networked distributed airborne strain test system to design a new front-end strain acquisition module.
The author uses the 4 high-precision DACs integrated inside the MAX1452 to provide programmable precision voltage excitation for the circuit of the full-bridge strain gauge, set the offset and temperature correction functions, and use the internal integrated PGA to programmatically amplify the micro-strain signal generated by the bridge. The signal conditioned by the MAX1452 is filtered by the high-performance switched capacitor filter MAX7420 for a 5th-order low-pass filter, and then converted by the A/D chip of the SPI interface. The FPGA encodes the 16-bit A/D data and inputs it into the network interface. The acquisition circuit uses fewer chips, has a small package, and low power consumption. The circuit board design realizes the complete independence of channel power supply and operation. When a channel fails due to a sensor failure, it does not affect the operation of other channels, effectively reducing the experimental cost of the strain flight subject.

1 Overall System Design
The structure of the strain acquisition module is shown in Figure 1. The entire system consists of a digital board and two analog boards connected up and down. During the test of the strain signal parameters of multiple channels: when the system is powered on and initialized, the main controller FPGA in the digital board of the module receives the loading command from the network system through the network interface, and performs software programming on the conditioning chip MAX1452 of each strain channel in the two analog boards, sets the excitation voltage, bias voltage, gain, and adjusts the clock signal frequency of MAX7420 to adjust the filter cutoff frequency; during the acquisition process, multiple channels are synchronously acquired, and the acquired strain parameters are encoded and sent to the network bus controller through the network interface on the digital board; at the same time, the 8-bit data of the temperature sensor integrated in the MAX1452 in each strain channel is read to determine the ambient temperature of each channel of the module, and the excitation voltage and bias voltage are corrected according to the temperature, and finally the acquisition work of the entire front-end module is completed.



2 System Hardware Design
The system hardware of the strain acquisition module consists of digital circuits and analog circuits. The analog circuit consists of multiple separate strain channel conditioning circuits. Each channel is the same, consisting of an excitation voltage and current enhancement circuit, MAX1452 and its peripheral auxiliary circuits, DC/DC power conversion circuits, filtering and A/D acquisition circuits. Its hardware design diagram is shown in Figure 2. The digital circuit mainly includes a 28 V DC power conversion circuit, FPGA and its peripheral circuits and a network interface circuit. Due to space limitations, this article mainly introduces how this module uses the highly integrated sensor conditioning chip MAX1452 to process micro-strain signals. The digital circuit part will not be introduced in detail below.
2.1 Introduction to MAX1452
MAX1452 is a highly integrated analog sensor signal processor produced by Maxim, which can be used to optimize sensors using resistive elements in industrial and process control. MAX1452 has amplification, calibration and temperature compensation functions, and its comprehensive working characteristics can approach the inherent repeatability of the sensor. Its all-analog signal path does not introduce quantization noise into the output signal, and uses an integrated 16-bit digital-to-analog converter (DAC) to achieve digital calibration. The 16-bit DAC is used to calibrate the offset and span of the signal, giving the sensor products true interchangeability.
The MAX1452 structure includes a programmable sensor excitation, a 16-level programmable gain amplifier (PGA), a 768-byte internal EEPROM, four 16-bit DACs, a general-purpose operational amplifier, and an embedded temperature sensor. In addition to offset and span compensation, the MAX1452 also uses the temperature coefficient (TC) of the offset and the span temperature system (FSOTC) to provide unique temperature compensation, providing extraordinary flexibility while reducing the detection cost.
The performance characteristics of this chip are mainly that a single chip provides an analog amplifier circuit for sensor signals, as shown in Figure 2. It uses an analog architecture to achieve first-order temperature response correction. On this basis, other digitally controlled analog amplifier channels are used to achieve nonlinear temperature response correction. Calibration and correction are achieved by changing the gain on the offset and programmable gain amplifier (PGA) and the excitation voltage and excitation current on the sensor bridge. The PGA has 16 levels of gain from 39 V/V to 236 V/V. It uses four 16-bit DACs, and the user stores the calibration coefficients in its internal 768x8 EEPROM. These memories are stored in the form of 16-bit words, including configuration registers, offset calibration coefficient tables, offset temperature coefficient registers, span (FSO) calibration tables, span temperature error correction coefficient registers, etc., making the design of hardware circuits more convenient and reliable.

2.2 Hardware Implementation of Single-channel Strain Acquisition Circuit
According to the characteristics of the MAX1452 chip, the MAX1452 provides programmable voltage source excitation or current source excitation for external sensors. When powering an external sensor, the external sensor power supply is required to meet the output current or voltage restrictions of the on-chip excitation source. Considering that the sensor strain bridge used in the strain test system developed this time has a 350 Ω impedance, when providing +5 V voltage excitation, it is necessary to provide a current of about 14 mA, while the MAX1452 can only provide a maximum current of 2.5 mA, so it is necessary to enhance its current driving capability. At the same time, the MAX1452 is suitable for sensors with an output sensitivity of 4 mV/V to 60 mV/V, and in this system, when the strain bridge measures the minimum range of 1 000μs, a 10 V power supply only generates a 5mV output voltage signal, so a high-precision differential amplifier is still needed between the MAX1452 and the strain bridge for pre-amplification. [page]
The references of the four 16-bit DAC modules inside the MAX1452 are all from its power supply pin VDD, so the accuracy of its power supply voltage has a great impact on performance. Here, a high-performance voltage reference chip MAX15006B is used to convert the +12 V power supply voltage into a high-precision +5 V voltage, providing a stable power supply and reference voltage for the MAX1452 and other chips. It is worth noting that the system circuit hardware and software design here only uses the digital mode of the MAX1452 in a non-proportional working circuit in the working mode, and uses the first-order linear temperature correction function in the temperature correction, but does not consider other working modes of the MAX1452.
The MAX1452 exchanges data with the microcontroller through a bidirectional pin DI/O, and the protocol for communication between them is asynchronous serial communication. When the host sends the initialization sequence, the MAX1452 will automatically detect the baud rate of the host. Regardless of how the internal oscillator of the MAX1452 is set, the baud rate between 4 800 bps and 38 400 bps can be detected. The data format is always 1 start bit, 8 data bits, 1 stop bit, and no parity bit. One function of the pin UNLOCK is to control the communication status between MAX1452 and the microcomputer: when it is low, MAX1452 is prohibited from communicating with the microcontroller. Another function of the pin UNLOCK is to set the working mode of MAX1452 in conjunction with the encryption lock control register (i.e. CL[7:0]). This mode is not used here, and it is only connected to a general I/O port of the microcontroller. The CLK1M pin provides a standard 1 MHz clock signal to the outside through the configuration register for use by the external controller, which can reduce the design of the external oscillation circuit; when the signal is not needed, the output of the clock signal can also be turned off through the configuration register to reduce EMC interference.

3 System software design
The system software design mainly includes two parts: the design of the MAX1452 integrated chip firmware driver and the design of the entire acquisition module system control program. Here we use a large-scale programmable logic FPGA chip to implement it. The language used for development is Verilog HDL hardware description language, and the development environment is QualtusII software version 10.1. Since the software design for the communication between the FPGA controller and MAX1452 is the difficulty and focus of this software development, this article introduces it in detail below. The
communication between the FPGA controller and MAX1452 adopts an asynchronous serial communication protocol, and a bidirectional data line is required to realize data input and output. FPGA can use a general bidirectional I/O pin to simulate asynchronous serial asynchronous communication, or it can use the asynchronous serial communication interface integrated on most microcontrollers (such as the current general C51 series microcontrollers or ARM chips, etc.). The design of this strain test system uses the asynchronous communication peripherals integrated in the microcontroller (the baud rate needs to be set between 4800 bps and 38400 bps, and the data format needs to be set to 1 start bit, 8 data bits, 1 stop bit, and no parity bit) to realize the read and write control of the MAX1452 register.
When the MAX1452 works in digital mode (this design uses this mode), the FPGA needs to load register values ​​(including DAC data registers and configuration registers, etc.) through serial interface commands, erase or load data to the internal EEPROM, or read the value of the temperature sensor embedded in the MAX1452. The implementation steps are as follows: after the stable power supply supplies power to the device for 1 mS, first send an initialization sequence byte (0x01h), and if necessary, send a reinitialization series byte (0xFFh); secondly, read and write access to all registers, EEPROM cells, and temperature index values ​​according to the format determined by the IRS (Interface Register Set) (see references). The data format for microcontroller access to MAX1452 is shown in Figure 3.


The process of the microcontroller conditioning the sensor chip through MAX1452 is actually the process of continuously reading and writing the various registers for different purposes inside MAX1452. From the above description, we can see that reading and writing registers not only requires communication format commands, but also requires continuous byte splitting and byte combination according to the IRS format. Here we give the program flow chart of the microcontroller accessing the configuration register, as shown in Figure 4, so that readers can understand it more clearly.

4 Conclusion
Through the software and hardware design of the above system, the design of the front-end circuit acquisition module in the networked strain test system is realized in this paper, which meets the characteristics required in the design of the front-end acquisition module in the networked strain test system. The design scheme of this integrated sensor signal conditioning chip has high acquisition accuracy, small size and supply number in the actual application of flight tests. It can be distributed and installed in various narrow parts of the aircraft as required, achieving the expected design purpose.

Reference address:Design of the front end of the strain test system based on MAX1452

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