Synopsys Launches New IP Subsystem to Accelerate Data Fusion Processing in IoT Devices

 

 

 

 

 

Synopsys, Inc. recently announced the launch of the new Smart Data Fusion IP Subsystem, DesignWare® Smart Data Fusion IP Subsystem, an integrated, pre-verified hardware and software IP product optimized for efficient DSP performance and ultra-low power consumption. This Smart Data Fusion IP Subsystem provides optional DesignWare ARC® EM DSP processors, including the latest EM9D and EM11D cores with XY memory support, to improve signal processing performance. A built-in micro DMA controller minimizes system-level energy consumption, which supports data transfer while the processor is in one of several programmable sleep modes. The integrated peripherals, memory, hardware accelerators, and software DSP functions provide the required execution efficiency for common processing tasks in IoT applications, including continuously running sensor fusion, voice and image detection, and audio playback.

 

 "IoT edge devices increasingly need to combine low-power sensing capabilities with high-performance processing," said Tadaaki Yamauchi, vice president of Core Technology Business Unit at Renesas Electronics Corporation. "Through our collaborative demonstration platform, leveraging advanced 40nm embedded flash technology, Renesas and Synopsys are showing how designers can leverage complementary technologies, such as Synopsys' DesignWare Smart Data Fusion IP Subsystem and Renesas' innovative, high-speed embedded flash controller IP, to develop high-performance and cost-optimized IoT subsystems in a shorter time frame."

 

The DesignWare Smart Data Fusion IP is designed to process data from a large number of digital and analog sensors at the lowest power, offloading the main processor and enabling more efficient processing of sensor data. This fully configurable IP subsystem includes an ARC EM5D, EM7D, EM9D or EM11D processor. This family of low-power cores combines RISC and DSP processing and includes support for XY memory banks to achieve a sustained throughput of one 32x32 MAC operation (or two 16x16 MAC operations) per clock cycle. The additional signal processing bandwidth has been optimized to manage the large amount of data processing required by advanced sensor fusion algorithms and improve the processing efficiency of a range of audio formats including MP3, SBC, OPUS and AAC LC. For example, in a 40nm low-power process, ARC processors can perform codec tasks such as Bluetooth low complexity subband coding (SBC) at less than 40 microwatts of power while running at more than 25% lower frequency than competing processor products.

 

The subsystem's built-in micro DMA controller supports memory and peripheral access when the processor is in sleep mode, providing 4 times faster access times than traditional bus-based DMA implementations. In addition, the subsystem contains highly optimized I/O peripherals, including multiple SPI, I2C, and analog-to-digital converter interfaces, further reducing gate count and energy consumption while reducing engineering effort.

 

To simplify software development, the subsystem includes software drivers and a rich library of readily available DSP functions, including support for filtering, correlators, matrix/vector, decimation/interpolation, and other complex mathematical operations. By using native DSP processor instructions and tightly coupled hardware accelerators, designers can implement these sensor-specific DSP functions in hardware to improve performance efficiency and reduce power consumption. The subsystem can be supported by commercial software that covers a range of IoT features, including voice recognition, voice control, motion sensing, and audio post-processing and playback. In addition, Synopsys' open software platform, embARC Open Software Platform, enables software developers to access a complete set of free and open source software online to accelerate code development for the subsystem.

 

 “先进的传感器融合应用要求高集成度以及最低的功耗和最小的面积，”Synopsys IP和原型营销副总裁John Koeter说道。“全新的DesignWare Smart Data Fusion IP Subsystem为设计人员提供了一种预先验证过的硬件/软件解决方案；该解决方案为设计人员提供了管理特别任务时所需的DSP功能，同时还能满足系统功耗预算，这些任务例如处理传感器信息、识别声音和音频回放等。通过提供一个完整的、预先集成好的IP子系统，我们使设计人员能够快速地将这一关键功能整合到他们的物联网设备中，同时显著地降低风险并减少工作量。”