3nm becomes the next key battlefield
Latest update time：2020-04-03
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Samsung separated its foundry business in 2017, and has repeatedly stressed since then that it wants to challenge TSMC, the leader in foundry business. However, according to the revenue of both companies in the fourth quarter of 2019 as calculated by relevant research institutions, TSMC is still far ahead of Samsung, which ranks second.
(Source: TrendForce)
In this case, if Samsung Foundry wants to surpass TSMC, it can only place its hopes on the next generation of advanced processes. At its 2019 Foundry Forum, Samsung not only announced its advanced process development plan, but also announced their important progress in 3nm process. This move also brought the competition of advanced processes into the 3nm stage.
3nm becomes the key point of competition
According to Samsung's foundry development roadmap, Samsung's 5nm process will be launched to the market as an improvement of its 7nm LPP, while the 3nm process is regarded by Samsung as a key node to surpass TSMC. In this node, Samsung will adopt the GAA MCFET (multi-bridge channel FET) process. Why does Samsung bet on the 3nm node?
Judging from the competition between Samsung and TSMC in the past three years, when Samsung separated its foundry business, it was also the time when advanced technology was about to enter the 10nm process stage. At that time, both companies launched products with 10nm process. However, Samsung's only major 10nm customer was Qualcomm, which was not as good as TSMC.
Since then, Samsung has launched three different improved processes on 10nm in an attempt to grab more orders. After launching 10nm, TSMC turned to the more advantageous 7nm process. 7nm is a very important milestone for semiconductor manufacturing processes. In 2018, TSMC announced that its 7nm had begun mass production, while Samsung chose to use EUV on 7nm. In the same year, Samsung 7nm EUV also announced a mass production plan, but because its 7nm EUV process technology was not mature enough, it failed to gain market recognition. During this period, companies such as Huawei HiSilicon, Qualcomm, Intel and MediaTek have all thrown themselves into the arms of TSMC. Samsung missed the best time to grab 7nm orders.
However, according to market conditions, 7nm is still alive and well in today's market, and Samsung's 7nm EUV technology was also improved last year. As a result, Samsung snatched Nvidia's orders from TSMC with low prices. In addition, Samsung also snatched IBM's Power series processor orders from TSMC. But this is not enough to support Samsung to surpass TSMC in 7nm. Therefore, Samsung can only look to the next generation of advanced processes.
Why didn't Samsung aim at the 5nm process? According to current news, foreign media reported that TSMC will start mass production of 5nm chips in April. Samsung is accelerating the construction of the 5nm production plant V1 in Hwaseong, South Korea, and is expected to complete the production line construction by the end of June. Based on this, it is estimated that its 5nm process will not be able to be produced until the end of this year at the earliest. From this point of view, Samsung cannot surpass TSMC in the 5nm progress for the time being and enter the mass production stage first. This also means that Samsung will miss the first batch of orders for chips using the 5nm process.
Therefore, Samsung is targeting the 3nm process and trying to enter mass production first, which will support it to surpass TSMC. In addition to these two, Intel also has high expectations for 3nm. According to Fast Technology, Intel plans to launch the 7nm process at the end of 2021, and 5nm will regain its leadership. Its chief financial officer Davis predicts that Intel's 7nm node (roughly equivalent to TSMC's 5nm) will catch up with the industry's development level by the end of 2021. If this development is speculated, Intel's 5nm performance may be equivalent to TSMC's 3nm, and Intel plans to regain its leadership in 5nm, which means that there will be another 3nm player.
Three major manufacturers are gearing up
Wafer foundries will compete fiercely at the 3nm node. On the premise of ensuring yield, entering mass production first may bring greater competitive advantages. Therefore, many foundries have also invested heavily in 3nm technology.
In 2019, Samsung announced that it would invest US$115.8 billion in its logic chip business, including foundry services, over the next 10 years (until 2030) in an effort to surpass TSMC and become the world's largest chip foundry.
EUV is Samsung's trump card in trying to surpass TSMC. It was the first to use EUV technology in the 7nm process. Its Hwaseong V1 plant is Samsung's first production line dedicated to EUV technology. ES Jung, president of Samsung and head of foundry business, said that the V1 production line currently produces the most advanced mobile chips with 7nm and 6nm processes, and continues to move towards 3nm. According to Samsung's plan, the investment in the V1 production line will reach US$6 billion by the end of 2020. In order to support Samsung's goal of becoming the world's number one foundry in South Korea and a 10% market share in IC design by 2030. Last year, when visiting the factory, South Korean President Moon Jae-in said that the South Korean government would also invest 80 trillion won in the next 10 years to encourage investment and research and development by related industries. On the other hand, the South Korean government will also start with education policies to train 17,000 related engineers in the next 10 years.
Through a large amount of capital investment, Samsung also took the lead in announcing its progress on 3nm. In 2019, Samsung announced that it would abandon FinFET transistors at the 3nm node and switch to GAA surround gate transistor process. It is reported that the 3nm process using GAA technology can reduce the core area by 45%, reduce power consumption by 50%, and improve performance by 35%. According to Korean media Business Korea, Samsung Electronics has successfully developed the industry's first 3nm process, which is expected to start large-scale mass production in 2022.
Compared with Samsung, TSMC has less news about 3nm. In terms of investment, according to relevant media reports, TSMC's total investment in 3nm process is US$50 billion, of which at least US$20 billion is for plant construction.
In terms of production plans, foreign media reported that due to the impact of the new crown pneumonia epidemic, global logistics and personnel flow have been disrupted, and equipment supply has been affected at the same time. TSMC's 3nm trial production line installation has been forced to be postponed. The original installation arrangement in June will be delayed to October.
In terms of technology, TSMC's news about 3nm is not very clear. It was just reported before that TSMC took a more prudent approach in the selection of transistors, which is still divided into two steps. First, the initial 3nm still uses FinFET technology, and then turns to GAA transistor technology in the later stage of 3nm or 2nm after maturity. But it was once revealed by industry insiders that TSMC's 3nm process has made new breakthroughs in surround gate technology. According to this process, TSMC already has surround gate technology but has not given priority to introducing it into the 3nm process, perhaps to seize the opportunity to mass produce 3nm first (Samsung gave priority to EUV technology on 7nm, but because the technology was not mature enough, it missed a large number of 7nm orders. From this point of view, introducing new technology is a very risky thing for foundries. Therefore, in the face of new transistors, TSMC maintains a cautious attitude). More detailed news about TSMC's 3nm may be disclosed at its technical forum, but according to the latest reports, TSMC's technical forum originally scheduled for April 29 will be postponed to August 24. From this perspective, we will only be able to see TSMC’s progress in 3nm technology later this year.
There is even less news about Intel on 3nm. According to Techweb, according to Intel's development plan, Intel's 7nm process will be adopted in 2021, and 7nm+ and 7nm++ will be launched in the following two years. After 7nm are the more advanced 5nm, 3nm, 2nm and 1.4nm. Among them, 5nm, 3nm and 2nm are in the route discovery stage, and are planned to be adopted in 2023, 2025 and 2027 respectively. The 1.4nm process is planned to be adopted in 2029. At the same time, there are also reports that Intel will abandon FinFET transistors in the 5nm process stage and turn to GAA surround gate transistors. Its chief financial officer has also pointed out that Intel is going to mass produce 10nm, speed up 7nm, and invest in 5nm. Considering that this part of the technical intersection is mainly concentrated in 2020~2021, it will inevitably affect Intel's gross profit margin.
Challenges in the 3nm battle
Foundries are actively preparing for the competition when 3nm arrives. In this process, there are still many challenges waiting for them to solve.
The first is the challenge of EUV equipment. Although TSMC and Samsung's 7nm EUV products are now on track. But when the advanced process advances to 3nm, the related EUV technology will change again. According to relevant reports, 3nm EUV may adopt multiple exposures (three directions of 3nm EUV technology: first, maintain the engineering coefficient of single exposure at 0.29; second, combine two exposures (LELE technology) and change the engineering coefficient to 0.39; third, use three exposures (LELELE) technology). And this involves the development of EUV exposure technology. The most important thing is the improvement of EUV exposure equipment (EUV scanner).
Secondly, the EUV industry chain is not perfect. Mo Dakang once said in his article that EUV masks, pellicle films, defects in detection masks, and light source power will affect the use of EUV technology in advanced processes.
The new transistors used in 3nm also have challenges. The emergence of new transistors means that foundries will invest in them on a large scale. Although TSMC, Samsung and Intel all plan to invest in GAA, whether the new transistors adopted in the early stage of 3nm can be accepted by the market is also something worth considering for manufacturers. According to a report by Magnet, with the changes in technology and the development of the market, the variables of future process technology in the market are becoming more and more large, so it is becoming increasingly difficult for 3nm GAA to achieve the expected effect of defeating the enemy. TSMC has stated that in terms of materials, III-V materials may also replace traditional silicon as the channel material of transistors to increase the speed of transistors. According to relevant reports, III-V compounds can replace silicon fins on FinFETs. III-V compound semiconductors have no obvious physical defects and are similar to the current silicon chip process. Many existing technologies can be applied to new materials.
In addition, if the GAA process is used, new materials InAsGe nanowire and Silicon nanowire need to be introduced, so the process technology is quite difficult, especially the etching part is a big challenge.
In addition, interconnection at the 3nm process node is also a challenge. Interconnection is a tiny copper wiring scheme in the chip, which becomes more compact at each node, causing unnecessary RC delays in the chip. According to the course summary of IEDM, a variety of new interconnect technologies may appear after 3nm, and BEOL needs miniaturization boosters and DTCO to enhance process capabilities to achieve device architecture. Pre-filling (using Co or Ru) can provide a stepping stone for alternative metals. But interconnection will require alternative metals such as Co or Ru.
Conclusion
Although the prototype of 3nm has not yet appeared in the industry's vision, the industry is paying close attention to the progress of 3nm. At this node stage, the competition between the relatively conservative TSMC and the aggressive Samsung will enter the white-hot stage. At the same time, Intel announced that they also plan to return to the leading position in the 5nm stage, pushing the competition of 3nm to a climax again. Regardless of the result, the foundries will have a battle at the 3nm node, and the winner will be the king.
*Disclaimer: This article is originally written by the author. The content of the article is the author's personal opinion. Semiconductor Industry Observer reprints it only to convey a different point of view. It does not mean that Semiconductor Industry Observer agrees or supports this point of view. If you have any objections, please contact Semiconductor Industry Observer.
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