The battle for EUV lithography equipment has changed suddenly

Starting from the early deep ultraviolet (DUV) lithography machines, their stable and reliable performance laid a solid foundation for the development of the semiconductor industry; later, the extreme ultraviolet (EUV) lithography machines, with their unique extreme ultraviolet light source and shorter wavelength, successfully pushed the lithography accuracy to a new height; and now, the high numerical aperture (High-NA) lithography machines have officially entered the historical stage, further improving the accuracy and efficiency of lithography and providing the possibility for the manufacture of smaller and more sophisticated chips.

Especially with the advent of ASML High-NA EUV lithography machine, the world's most advanced chip manufacturing equipment, it has significantly improved the transistor density and performance of the chip, which is crucial for achieving large-scale mass production of advanced processes below 2nm.

Under this situation, major wafer manufacturing companies such as Intel, TSMC, Samsung, and SK Hynix are waiting for the opportunity, competing to introduce or announce market progress of High-NA EUV lithography machines, indicating that the semiconductor industry will usher in a new round of technological innovation and climax of competition.

Among semiconductor giants, Intel is the first company to order the new High-NA EUV equipment EXE:5000 from ASML.

As early as December 2023, Intel won the world's first High NA EUV lithography machine, and announced in April this year that it had completed the assembly of the world's first commercial High-NA (0.55NA) EUV lithography machine at the Fab D1X R&D wafer factory in Hillsboro, Oregon, USA. It has now entered the optical system calibration stage and plans to use it on its 18A (1.8nm) and 14A (1.4nm) nodes.

In August this year, Intel announced that it had successfully received the world's second High-NA EUV lithography machine worth US$383 million. The installation and debugging has been successfully completed at its wafer factory in Oregon.

ASML had earlier stated that the recent production capacity of 2nm lithography machines is only 10 units, and it is expected to produce 20 units per year by 2028. It is worth noting that among these 10 latest lithography equipment, public data shows that 6 have been acquired by Intel.

It can be seen that Intel has gained a far-leading advantage in the introduction of the most advanced lithography machines.

As the saying goes, "Every failure makes you wiser", and the reason why Intel is so active in choosing High-NA EUV equipment is actually largely due to its previous setbacks in EUV.

As we all know, Intel has cooperated with ASML for decades to promote the development of lithography technology from 193nm immersion lithography to EUV. However, due to cost considerations, Intel's then CEO was reluctant to adopt the expensive ASML EUV lithography machine and chose not to use this technology in its 10nm process. Instead, he used DUV lithography machines for quadruple patterning. As a result, Intel encountered many difficulties in yield.

Looking back at history, we can see that in 2011, Intel launched the 22nm FinFET process, which was far ahead of TSMC and Samsung's 28nm at the time. However, starting from the 14nm node, Intel suffered a series of setbacks.

In 2014, both Intel and Samsung achieved the production of 14nm process chips, but by 2017, TSMC had advanced to 10nm and 7nm processes. However, Intel was unwilling to adopt the latest EUV lithography technology, which resulted in its original plan to mass-produce 10nm chips in 2016 not being realized until 2019, two and a half years later than TSMC's launch time. Its 7nm chip will not be launched until 2022.

In fact, in addition to failing to grasp EUV technology, Intel's decline in foundry business is also closely related to its "Tick-Tock" strategy.

Paul Otellini, former CEO of Intel, once proposed a "Tick-Tock" strategy for chip manufacturing, which is to update the manufacturing process in the Tick year (process year) and the micro-architecture in the Tock year (architecture year), which is equivalent to a process improvement every two years. However, in the same period, in order to implement "efficient management" and "cost saving plans", Intel laid off 20,000 employees, and a large number of engineers involved in the research and development of next-generation chip processes and architectures were laid off, making the "Tick-Tock" model difficult to sustain. The 14nm chip was delayed for a year before it was launched, and the 10nm chip was delayed several times.

Intel makes tiny annual updates to its chip technology like squeezing toothpaste, and was once ridiculed as the "toothpaste factory" in those years.

With the collapse of the Tick-Tock model and the missed early EUV technology window, Intel began to fall behind.

At the same time, TSMC and Samsung purchased a large number of EUV equipment from ASML, continuously reducing the process size of chips, improving chip efficiency and performance, and greatly enhancing their competitiveness in the field of wafer foundry. In terms of advanced processes, Intel has been left far behind by TSMC and Samsung.

What's more serious is that backward production technology and declining product competitiveness have not only affected Intel's foundry business, but also continuously eroded the market share of its desktop chips and server chips.

It can be said that a single move can affect the entire body.

Therefore, after learning from its mistakes, Intel took the lead in launching an offensive against High-NA EUV lithography machines, trying to make up for the gap.

As mentioned above, in April 2024, a huge device weighing 150 tons was installed at Intel's research facility in Oregon, USA.

This is also after Intel CEO Pat Gelsinger proposed the "IDM 2.0" strategy, quickly refocusing on improving cutting-edge process technology and proposing a four-year plan of five process nodes, hoping to catch up with and surpass TSMC's 2nm process by 2025 with Intel 18A.

At the same time, Intel hopes to maintain its lead over competitors such as TSMC by taking the lead in adopting High NA EUV lithography machines. Intel's goal is to achieve mass production of Intel 14A process technology between 2026 and 2027, and further improve process technology on this basis. Ultimately, Intel's foundry business will achieve a break-even operating profit margin by 2030 and become the world's second largest wafer foundry.

Guided by the goal, Intel is continuously strengthening the construction of foundry infrastructure and plans to invest $100 billion in the next five years to expand advanced chip manufacturing capabilities. At the same time, it will invest about 30 billion euros to build two semiconductor factories in Magdeburg, Germany. These investment plans will greatly enhance Intel's chip foundry capabilities.

However, the strategic vision is beautiful, but the reality is cruel.

Despite Intel's ambitions, due to huge investments in four years and five nodes and route evolution, ecosystem construction and capacity expansion, Intel disclosed that its foundry business revenue last year fell 31.2% year-on-year to US$18.9 billion, and its operating loss expanded by 34.6% year-on-year to US$7 billion.

2024 may be the year with the worst operating losses for Intel's chip manufacturing business. The first quarter financial report this year showed that the business had an operating loss of US$2.5 billion, almost double that of the previous quarter; the loss in Q2 reached US$2.83 billion, and the foundry loss continued to expand.

According to data from research firm TrendForce, Intel did not make the top 10 global foundry revenue list in the second quarter of 2024. In the past few years, Intel briefly made the list in the third quarter of 2023, with a market share of only 1%.

This means that IFS has not been able to truly support Intel's goal of reshaping its industry position with cutting-edge chip manufacturing in the past three years. At the same time, as the only company in the United States capable of taking on the role of cutting-edge foundry, Intel is unable to shoulder the heavy responsibility of the times.

According to Mind Observer, Jay Goldberg, president of the US semiconductor consulting firm D2D Advisory, also pointed out: "The real challenge facing Intel's foundry is that their economic model must have more customers to support the research and development required to continuously advance their manufacturing processes. They must increase external customer demand and double the size of their revenue to support continued progress on the track of Moore's Law."

It is not difficult to see that Intel is currently in a dilemma. Its performance continues to decline, and it even turned from profit to loss in 2024. Its stock price plummeted by nearly 60%, and its market value fell below US$100 billion several times, making it one of the worst performing technology stocks in the S&P 500 index.

In the face of the crisis, Intel said in an internal letter that it would further separate chip manufacturing and design businesses, which is part of a series of new measures to address one of the most serious crises in the company's 50-year history.

According to Intel's previously released forecast data, after the spin-off of the wafer manufacturing business, it can save $3 billion in costs in 2023 and $8-10 billion in costs in 2025. At the same time, the construction plans of factories in Germany and Poland will be postponed for 2 years; the construction of the factory in Malaysia will be completed, but the official opening time will depend on market conditions and capacity utilization.

While Intel continues to urgently implement the plan announced last month, it is also working to carefully manage its existing cash to meaningfully improve its balance sheet and liquidity. This includes selling some of Altera's shares and promoting its independent IPO; in terms of product development strategy, it also plans to simplify the x86 product portfolio. This is also a plan that Intel has discussed publicly many times.

In August this year, Intel was even reported to be considering splitting its product and foundry businesses. It is worth mentioning that after the news of the possible split of its wafer business, Intel's stock price rebounded by more than 9%, which shows how disappointed investors are with the chip foundry business.

Intel, which is in a trough, is a microcosm of the US chip manufacturing industry. Cost, technology, resources, IDM status, etc., are all restricting Intel's ambitious chip foundry plan. But although the industry has also discussed the possibility of giving up chip foundry, and although the continued losses of chip foundry business have made the capital market dissatisfied, this is also one of the few key layouts that can save Intel from the water and fire.

Intel had no choice but to seize any opportunity and go for it.

Therefore, Intel needs the most advanced High-NA EUV lithography machine as a production and marketing tool to demonstrate its R&D and manufacturing capabilities below 3nm and try to expand its customer base. However, as a new machine, the High-NA EUV lithography machine forces Intel to take the pressure of equipment depreciation and mass production amortization costs to quell external doubts.

Given the continued competition in the industry and the “asset-heavy, long-cycle” nature of chip foundry, Intel still has many tough battles to fight, especially as it embarks on the biggest transformation in its history to save itself.

Intel has also had experience in recovering from difficulties in the past. In the 1980s, under the offensive of Japanese companies, Intel withdrew from DRAM and focused its operating resources on CPUs, sweeping the personal computer market.

As Gelsinger put it: “This is Intel’s most important transformation in more than 40 years. We have not attempted anything of this magnitude since the transition from memory to the microprocessor. We succeeded then, and we will meet this moment and build an even stronger Intel for decades to come.”

But Intel's various self-rescue efforts still need time to be tested.

In August this year, at the "2024 Lithography + Patterning Academic Conference", Samsung Electronics stated that in order to maintain its competitiveness in the "chip war" with global semiconductor competitors such as Intel and TSMC, the company is actively participating in technology development. It will introduce the company's first High-NA EUV equipment "EXE:5000" as early as the end of 2024 to the first quarter of 2025, and is expected to achieve full commercialization of the technology in 2027.

It is reported that the equipment may be placed at the Semiconductor Research Institute (NRD) located in the Hwaseong Park and is expected to be used in the foundry business to further enhance its competitive advantage in the advanced node field.

In fact, Samsung chip manufacturing had an absolute advantage in the early years. When Steve Jobs released the first generation of iPhone in 2007, it used ARM architecture chips purchased from Samsung. The A4, A5, A6, and A7 chips installed in the iPhone 4, iPhone 4s, iPhone 5, iPhone 5s/5c were also manufactured by Samsung. TSMC had no presence at that time.

Until 2011, Samsung also engaged in the research and development and sales of mobile phone chips and mobile phone terminals, thus competing with Apple in the smartphone market. The two sides pulled each other until June 2018 when they reached a settlement.

In this process, Apple also started the process of "de-Samsungization" . The A8 chip launched in 2014 was all turned over to TSMC for foundry. TSMC was able to successfully snatch Apple's orders from Samsung. On the one hand, Apple was eager to find an alternative foundry, which created a great opportunity for TSMC. On the other hand, TSMC made a major breakthrough in the 20nm process, and the yield rate was greatly improved. However, Samsung's 20nm process suddenly failed, and the key problems could not be solved for a long time, and the yield rate could not meet Apple's requirements. It was precisely this time and place that allowed TSMC to successfully embrace Apple.

On the other hand, Samsung, after losing its major customer, decided not to pursue 20nm, but to jump directly from 28nm to 14nm, surpassing TSMC's 16nm. Therefore, in 2015, Apple allocated part of the A9 chip order to Samsung, resulting in two versions: TSMC-made and Samsung-made. In theory, Samsung's 14nm performance should be better than TSMC's 16nm, but consumers' word of mouth is completely the opposite, and many people are worried about buying the Samsung-made version.

This defeat caused Samsung to completely lose Apple's foundry orders. Apple's chips were subsequently all manufactured by TSMC, and the process technology has steadily increased from 16nm in 2015 to 4nm.

At the same time, Qualcomm almost fell into Samsung's foundry business. The Snapdragon 8+Gen1 was urgently switched to TSMC's 4nm foundry, which forcibly restored Qualcomm's reputation and market position.

Samsung has an advantage in the chip foundry industry, but it suffered a series of setbacks in the mid-term, allowing TSMC to gradually overtake it, leading it by a wide margin today. However, Samsung is also aware of the technological gap between itself and TSMC, so if it wants to overtake TSMC, it must come up with a stronger "trump card".

As a result, Samsung has placed almost all its hopes of catching up with TSMC on the 3nm process. In 2023, Samsung was the first to launch a 3nm process, using the more advanced GAA (Gate All Around Transistor) technology, ahead of TSMC's FinFET technology.

It can be said that 3nm is equivalent to Samsung’s last “do-or-die battle”. If it can catch up with TSMC in one fell swoop, there may be a chance for a two-horse race in the future.

However, judging from the market progress, Samsung's 3nm process faces challenges in terms of yield, which has led to an embarrassing situation. Although Samsung's 3nm chip was launched earlier than TSMC, its cost is much higher than TSMC's, and its performance is also different. It is reported that Samsung's second-generation 3nm process has an unstable yield rate, and its own Exynos2500 yield rate is less than 20%. Samsung's Galaxy25 series of mobile phones are all equipped with Snapdragon 8Gen4 processors, and they gave up the self-developed Exynos2500 version because the experience difference is too great.

After the gap with TSMC widened, fewer and fewer customers placed orders with Samsung.

In the past, Qualcomm's advanced process chips have always been exclusively manufactured by Samsung. As a result, after the 5nm chips, Qualcomm also gave the advanced process chip orders to TSMC. Nowadays, Apple's A17 and A18 series chips are all manufactured using TSMC's 3nm process; Qualcomm's 3nm chips and MediaTek's Dimensity 9400 are also all manufactured by TSMC; even Nvidia, AMD, and Tesla's 3nm chips are all manufactured by TSMC, including Intel's current orders have also been given to TSMC.

In chip manufacturing, TSMC alone has captured more than 60% of the global market share, with 3nm chip manufacturing accounting for almost 100% of the market share, and chip manufacturing below 7nm accounting for 90% of the market share. The second largest foundry, Samsung, has a market share of only 11.5%.

According to Chosun Ilbo, Samsung has shut down 30% of the 4nm, 5nm and 7nm production lines at Pyeongtaek Plant 2 and 3. It is expected that the capacity will continue to be shut down to 50% by the end of 2024. This move is obviously to cope with the current situation that global technology giants such as Nvidia, AMD and Qualcomm have failed to give Samsung Electronics large-scale orders.

Industry experts have stressed that once equipment is shut down, it is a long process to resume normal operations. Typically, even during periods of low demand, companies will reduce utilization rather than shut down operations completely. However, nearly 30% of Samsung's advanced process equipment being idle is unprecedented.

In the third quarter of 2024, Samsung's non-memory divisions, including foundry and system LSI, lost more than 1 trillion won. In addition, Samsung's 3nm process yield rate has remained low and has not been adopted by major customers. Recently, it has postponed the mass production of its advanced foundry wafer plant in Tyler, Texas, to 2026.

Overall, such a gap has completely shattered Samsung's dream of surpassing TSMC in the 3nm era.

Therefore, the news that Samsung has introduced the High-NA EUV lithography machine means that it will compete more fiercely with Intel and TSMC in the next-generation lithography technology.

Samsung plans to mass produce the 2nm process in 2025 and gradually expand it to other application areas. For example, it will first be used in the mobile field in 2025, expanded to HPC applications in 2026, and then expanded to the automotive field in 2027. Samsung's 2nm process node uses an optimized backside power supply network technology to reduce the interference of the power supply circuit on the signal circuit.

This development marks Samsung's first foray into High NA EUV technology. Previously, Samsung Electronics has collaborated with IMEC on circuit processing research. Samsung plans to accelerate the development of advanced nodes using its own equipment and has set a goal of commercializing the 1.4nm process by 2027, which could pave the way for 1nm production.

In addition, in order to achieve full commercialization, Samsung is also actively building a related ecosystem.

Samsung Electronics has reportedly purchased the Laser Technology Company's High-NA EUV mask inspection equipment "Actis (ACTIS) A300". It is expected that after completing the installation of ASML's EXE:5000 within Samsung Electronics, it will be officially introduced from the first half of next year. At the same time, it will cooperate with electronic design automation (EDA) companies to design new masks, including non-linear (Curvilinear) mask circuit drawing methods for High-NA EUV to improve the clarity of printed circuits on wafers. This cooperation involves companies such as Synopsys, a global leader in semiconductor EDA tools.

In addition to ASML, Laser Technology, and Synopsys, Samsung Electronics is expected to cooperate with photoresist companies such as JSR and Tokyo Electron, which is the tracking device "Number One" that applies photoresist to wafers, to prepare for the arrival of the High-NA era. Samsung Electronics is reportedly preparing to commercialize High-NA in 2027 through such ecosystem construction.

Samsung Electronics' foundry business is at a critical crossroads, and its survival seems to depend on the mass production of 2nm chip process technology. This is not only a technological leap, but also the key to whether Samsung's foundry business can be reborn.

However, the road to success is never smooth. Samsung has to face a series of severe challenges in advancing its technology blueprint:

First of all, there are technical difficulties. The yield rate of advanced processes has always been a sword of Damocles hanging over the heads of semiconductor manufacturers. Samsung's 3nm process failed to meet mass production standards due to low yield and questionable reliability, which undoubtedly cast a shadow on its foundry business.

Worse still, the market response was not what Samsung had hoped for. Despite Samsung's efforts to improve its technological capabilities, the reliability and competitiveness of its foundry business were still insufficient in the eyes of customers. Facing strong competitors such as TSMC, Samsung seemed powerless in winning high-end customers. This market dilemma further exacerbated Samsung's financial pressure. It is estimated that Samsung's foundry business may lose hundreds of billions of won in the third quarter, which is a major test for Samsung's management.

Faced with internal and external troubles, Samsung’s top management had to make a series of difficult decisions.

According to data from research firm Statista, despite Samsung's efforts to challenge TSMC over the years, Samsung's share of the foundry manufacturing market has fallen by 8 percentage points in the past five years. In the second quarter of 2024, Samsung accounted for 11.5% of the global foundry market share, while TSMC accounted for 62.3% of the market share.

Samsung's declining market share highlights the technical challenges it faces in mastering advanced chip manufacturing technology. It invested too much in the foundry business, failed to gain enough customers, and failed to stabilize production processes, which further led to Samsung's current crisis.

In general, the semiconductor industry is a field where technology is rapidly iterating and the market is unpredictable. Samsung must remain sensitive enough to cope with future changes. How to find a path suitable for its own development in a rapidly changing market is a problem that Samsung needs to solve urgently.

As a leader in the semiconductor industry, TSMC has made great achievements in the past 30 years. In the past few years, when facing the huge challenges and pressures brought by Samsung and Intel, TSMC judged the situation and took effective measures to become the world's largest chip foundry.

Today, even though the industry's leading semiconductor companies are scrambling for High-NA EUV equipment, TSMC does not seem to be in a hurry to join the ranks.

Previously, when talking about when to introduce High-NA EUV equipment, TSMC Senior Vice President and Deputy Co-Operating Chief Zhang Xiaoqiang revealed in an external interview that TSMC is confident and will not blindly expand purchases just because its competitors have rushed to purchase equipment. It will still take a steady and solid approach to deploy advanced processes to meet the challenges.

However, it has been reported recently that TSMC is expected to receive the first batch of the world's most advanced chip manufacturing equipment, the High Numerical Aperture Extreme Ultraviolet (High NA EUV) lithography machine, from ASML by the end of this year. This news marks another important step for TSMC in the field of semiconductor manufacturing.

Interestingly, TSMC was reluctant to accept High NA EUV in the early stage due to cost reasons. Earlier, TSMC CEO Wei Zhejia missed the "TSMC Technology Symposium 2024" and went to ASML headquarters in Eindhoven, the Netherlands to discuss equipment.

Now it looks a bit like TSMC's negotiation game, perhaps trying to get better terms with ASML.

It is rumored that Wei Zhejia personally negotiated with ASML and reached an agreement to reduce the overall price by nearly 20% through a combination of purchasing new equipment and selling old models. The reason why ASML agreed to sell High-NA EUV equipment to TSMC at a discount is mainly because TSMC is its super VIP customer, and ASML made a big concession. This concession includes fully assisting TSMC in machine purchase, adjustment and technical support to accelerate the launch time.

As a result, TSMC's attitude has also undergone a dramatic change, from its original hesitation about the price of the new High NA EUV lithography machine to actively seeking cooperation.

It is reported that TSMC is expected to install a new High NA EUV lithography machine at its R&D center near its headquarters in Hsinchu, Taiwan, this quarter. In the short term, TSMC plans to use the High NA EUV lithography machine mainly for R&D to develop related infrastructure and model solutions required by customers to drive innovation.

According to ASML's roadmap, the first generation of High-NA EUV lithography machine TWINSCAN EXE:5000 may be mainly used by wafer manufacturers for related experiments and tests, so that the company can better understand the use of High-NA EUV equipment and gain valuable experience. Actual mass production will rely on the TWINSCAN EXE:5200 shipped at the end of 2024.

TSMC’s upcoming N2 (2nm) and A16 (1.6nm) process technologies will rely entirely on conventional EUV equipment with 0.33 NA optics. The industry expects TSMC to adopt 0.55 NA EUV tools as early as 2028 or later for its A14 (1.4nm) process technology, although the company has not officially confirmed this yet.

Compared with its competitors, TSMC can accumulate valuable experience data and optimize processes through continuous production practice, making it difficult to build a virtuous cycle system of "order-driven-technology iteration-re-order". In other words, TSMC has a very large group of high-quality customers to help them debug various equipment bugs, which is exactly what Samsung and Intel lack.

The author has mentioned before that judging from the layout strategies and methods of the Big Three, TSMC is often regarded as a conservative technology developer that tends to ensure the maturity and reliability of new technologies before deploying them, rather than rushing to bring new technologies to market.

Judging from actual market performance, TSMC's move can reduce the risk of technological failure, improve the output and quality of its chips, and thus ensure customer satisfaction.

For example, Samsung started using EUV lithography in its 7nm process in 2018, but TSMC chose to wait until the stability and maturity of EUV tools were confirmed and the related issues were resolved or at least identified before starting to use EUV in the N7+ process in 2019.

Since then, TSMC has continued to use this model in the transition from FinFET to GAA process. With its technological advantages and accumulation in process leadership and production yield, it is fully capable of competing with Samsung, which adopts GAA technology architecture.

TSMC is still taking its time when it comes to the BSPDN backside power supply technology that Intel has bet heavily on, and plans to add it to N2P, which will only start mass production at the end of 2026.

This cautious approach helps TSMC ensure the stability and predictability of its process technology, thereby providing high-quality chips to its customers.

But in the field of advanced packaging, TSMC has changed its usual practice and actively made plans to be the first to implement them. The combination of advanced processes and advanced packaging has brought it a new wave of growth.

This well-balanced strategy fully demonstrates TSMC's strategic philosophy and unique vision. TSMC has always been the first to take the lead in the blue ocean track it has identified, whether it was the first to trial-produce 16nm FinFET process technology ten years ago to surpass Intel, or to deploy advanced packaging five years ago to reap today's AI dividends, TSMC has brilliantly demonstrated the so-called phoenix that will not fall without treasure.

In the field of advanced processes where it maintains a significant advantage, even in the face of relentless pressure from Samsung and Intel, TSMC did not choose to be blindly aggressive. Instead, it adopted a strategy of observing first and then following, and "followed closely" after making adequate preparations and planning. Relying on its strong production capacity, yield rate and basic advantages of customer base, TSMC has maintained its unbeaten position.

In addition, in the field of storage, SK Hynix's first High NA EUV lithography machine "EXE:5200" is expected to be introduced in 2026 to support the mass production of its advanced DRAM products. This move further demonstrates the semiconductor industry's continued pursuit and investment in advanced process technology.

In 2023, SK Hynix formed a separate team to develop High-NA EUV technology.

As a giant in the HBM field, SK Hynix is ​​continuously increasing its internal investment in the development of High-NA EUV technology and actively expanding the relevant R&D team. Although information such as the specific wafer fab location where the equipment will be installed and the direction of additional investment has not yet been made public, the industry generally expects that this technology will be quickly applied to the mass production of 0a (single-digit nanometer) DRAM to further enhance product competitiveness.

The world below 7nm is a paradise for alternative adventurers, and the competitive and cooperative relationship between TSMC, Samsung and Intel has become increasingly subtle.

According to the "Rayleigh formula" of lithography machines, the improvement of lithography technology has been carried out in multiple dimensions over the past few decades, that is, the continuous optimization of exposure wavelength, numerical aperture and process factors. However, the shortening of exposure wavelength and the increase of numerical aperture (NA) have already approached the limits of comprehensive physical and cost considerations.

Now that we are getting closer and closer to the limit of Moore's Law, the industry has almost reached the end of the tunnel. 2nm and the next few generations of process nodes will be the key for chip giants to seize the market.

Globally, competition is heating up among semiconductor giants such as TSMC, Intel, and Samsung, who are competing to obtain High NA EUV equipment for processes below 2nm. Intel was the first to obtain the equipment in December 2023, followed by TSMC in the third quarter of 2024. Although Samsung's orders came late, achieving stable production may be the key factor in determining industry leadership.

But the competition in chip foundry is not only a competition of technology, but also a comprehensive competition of customers, brands, yield, production capacity, etc. It is unknown whether Intel and Samsung can seize the opportunity to rise again at the dawn of the new market. If they fail, TSMC will continue to dominate.

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