Automotive SoC will be reshaped and IP will usher in new changes!

Latest update time：2021-10-21 18:35

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With the advent of the era of new energy vehicles and self-driving cars, new applications such as ADAS/AD, car connectivity and V2X have emerged, which have brought new application directions to the automotive architecture. As the architecture evolves, new requirements have also been put forward for automotive SoCs. Now the industry believes that a new architecture will reshape the layout of automotive SoCs. In such a major change, what role will automotive-grade IP play?

Automotive Zonal Architecture Appears, Automotive IP May Provide Support

Nowadays, the number and types of sensors required by cars are increasing, including imaging, lidar, infrared and other sensors. Last year, Google's Waymo used 29 cameras. In addition, these new applications have greatly increased the functional safety requirements for SoC level. Moreover, more and more artificial intelligence has begun to be applied to the automotive field, such as BEV/HEV power system SoC with artificial intelligence, and new smart sensors have also increased the difficulty and complexity of sensor SoC design. The increase in the number of sensors and the higher integration level require higher computing and processing capabilities.

At the same time, the automotive architecture has also ushered in new application directions, mainly in three major areas: one is ADAS; the second is in-vehicle entertainment and car interconnection; the third is the automotive gateway. The application focuses of these aspects are also different. ADAS has high requirements for the number of sensors, AI reasoning capabilities, image processing and other performance, so the requirements are the highest in terms of both process and specifications. For example, some automotive processors have begun to transition from 16nm to 7nm and 5nm. In-vehicle entertainment needs to carry smooth user operations and display interactions, and the performance requirements are also increasing. Even more AI processing is gradually being introduced, resulting in that in-vehicle entertainment chips can even replace some ADAS chips under certain conditions. The automotive gateway does not have as high requirements for performance and processing as ADAS, and focuses more on the aggregation and distribution of network data, and has high requirements for priority and real-time performance.

The industry believes that a new automotive architecture is reshaping the layout of automotive SoCs. In the past, the division of automotive architecture was relatively discrete. Each car had about 30-100 ECUs for various electronic controls, and there was no unified management mechanism to optimize the performance of each component. Later, as the demand for performance increased, it was no longer realistic to simply add ECUs, so now more and more ECU functional integration is being carried out, also known as Domain logical architecture, to reasonably control the distribution and number of ECUs. However, this method is also relatively discrete, because it is not very beneficial for the layout and wiring of the entire vehicle. The industry believes that a Zonal physical partition architecture will evolve in the future . It will no longer be divided by logical functions, but by a certain area of the car. There are multiple central processing chips interconnected to better process data, and the regional division method will better integrate discrete ECUs, and centralized management can also be done in terms of power management.

Image source: Synopsys

The new electronic architecture requires the redesign of integrated computing and intelligent sensor architecture, the integration of sensors, improved connectivity and upgradeability, and the highest reliability, safety and energy efficiency. A good automotive IP may play an important role in this.

Automotive IP mainly includes interface IP, storage IP, processing operation IP and security IP. In terms of interface IP, the current mainstream is 1Gbps Ethernet TSN. In the future, automotive Ethernet will migrate to 2.5Gb, 5Gb or 10Gb. The MIPI Alliance has developed a 15-meter channel A-PHY. The Automotive SerDes Alliance (ASA) has defined 15m high-speed asymmetric point-2 point communication, up to 13Gbps. While competing with each other, they are promoting the evolution of long-distance high-speed data transmission interfaces. MIPI D-PHY is mainly used in displays. MIPI DSI is an ideal choice for new applications such as rearview mirrorless displays. In terms of storage IP, it is evolving from LPDDR4 to LPDDR5. Currently, LPDDR4 3200mbps is the most popular, and it will move to LPDDR5 6400mbps in N7/N5. In terms of processing IP, embedded vision processors and DSPs, functional safety processors (ASIL BASIL D), and SoC-level safety architectures are constantly improving, and process technology is migrating from 28nm to 16/14nm, 8/7nm, and 5nm. The requirements for confidentiality and security are also constantly increasing. First of all, it must comply with ISO 26262, and ASIL D is increasingly required, and SoC-level safety managers must be used.

Image source: Synopsys

Synopsys' automotive-grade IP makes SoC vehicle certification worry-free

Synopsys' automotive-grade mixed-analog AMS IP has been selected by 32 major semiconductor companies in Europe, North America and Japan, with support for AEC-Q100 Grade 1, and even has little impact on PPA. Synopsys is also the first company to launch an ASIL D dual-core lockstep processor and safety manager architecture. Under the requirements of the automotive quality management system process, hardware random failures and AEC Q100 reliability testing are fully considered when developing IP.

According to Synopsys, its automotive-grade IP reduces risks and accelerates automotive SoC certification through three aspects: functional safety, reliability, and quality . In terms of functional safety, it can accelerate ISO 26262 functional safety assessments to ensure that designers reach ASIL target levels. By increasing IP reliability, Synopsys' automotive-grade IP can reduce the risk and development time of SoC AEC-Q100 certification.

"Safety-critical" systems must be designed to minimize the risk of catastrophic failures and react to failures in a predictable manner. Therefore, the Automotive Safety Integrity Level (ASIL) is divided into multiple levels from QM (lowest) to D (highest) according to the specified potential risk. The ICs in all these systems must meet the ISO 26262 functional safety requirements. Synopsys' IP products support all levels of ASIL to meet customer applications.

Image source: Synopsys

To meet various levels of ASIL, Synopsys has added a variety of specific safety mechanisms to the DesignWare Automotive IP.

First, at the protection level, there are some user interface protection, buffer protection points, error detection codes, parity protection data, configuration register parity protection, memory protection, etc. There is also protection at the security redundancy level. There are also further security protections such as register connections, validity checks of key modules, and processor dual-core Lockstep support.

Synopsys' IP FuSa has ISO 26262 definitions throughout the development process, follows the ASIL system process, and can reach the highest system level of ASIL D. Such IP will reduce the ASIL certification at the SoC level. At the same time, Synopsys is also continuously improving the process. During the development stage, their IP can conduct new monitoring and evaluation of intellectual property development for safety-critical operations, improve new work products and deliverables. Its ARC processor and interface controller IP are suitable for all ASIL-compatible automotive IPs.

Image source: Synopsys

Synopsys' entire IP group has obtained ISO 26262 development process certification, which means that they can revise the functional safety development process requirements. Furthermore, they have been certified by a third party to meet all applicable requirements of ISO 26262. Automotive IP products can be developed and reviewed according to the revised development process for ISO 26262 ASIL [B|C|D] compliant products, enabling automotive customers to meet the ASIL D system and random requirements of ISO 26262 ASIL compliant products.

In the field of ADAS, Synopsys' automotive "Safe and Secure" architecture can be called a trusted SoC execution environment. As shown in the figure below, the purple part is Synopsys' IP, the green part is the safety network, and the blue part is the trusted software environment with Fusa certification development. The green safety bus and safety manager connect the various functional IPs of the entire SoC, and on the interface IP, the STAR Memory & Hierarchical system tool is used to load various controllers to provide real-time evaluation and testing of all memories, logic and analog/mixed signal circuits.

Image source: Synopsys

Synopsys has defined internal reference temperature profiles based on multiple automotive conventions

Synopsys' SG has passed ISO 9001 quality certification, and SG's quality management system allows them to develop DesignWare's intellectual property and tools at sites around the world, helping to ensure IP quality, reduce integration risks, and accelerate time to market. Not only can it increase confidence in the intellectual property development process, customers no longer need to perform second-party quality audits.

Conclusion

ADAS, as the fastest growing automotive application, will grow at a compound annual growth rate of 19%. In this trend, Synopsys provides a complete ISO 26262 safety function integrated into the automotive intellectual property portfolio, from interface IP to basic IP, processor IP, and safety IP, all of which comply with ISO 26262 ASIL B and D standard processors and controllers, and also comply with AEC-Q100 design testing and automotive quality management, all of which will accelerate automotive SoC certification.

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