I heard that if you want excellent linearity, ADC and driver are a better match~

The LTC2185 is a dual-channel, simultaneous sampling parallel ADC that offers a choice of full-rate CMOS and double data rate (DDR) CMOS/LVDS digital outputs. Pin-compatible speed grade options include 25 MSPS, 40 MSPS, 65 MSPS, 80 MSPS, and 105 MSPS, while consuming only 1.5 mW/MSPS per channel approximate power. It features a digital output randomizer and an alternating polarity (ABP) mode that minimizes digital feedback when using parallel CMOS outputs. The 550 MHz analog full-power bandwidth and ultra-low jitter of 0.07 ps rms allow undersampling of IF frequencies while achieving excellent noise performance. To maintain this level of performance, the LTC2185 needs to be driven by an appropriate amplifier.

The ADA4927 is a high speed differential current feedback amplifier. Fabricated using ADI's silicon-germanium process, the ADA4927-1 has excellent distortion performance with an input voltage noise of only 1.3 nV Hz. Therefore, it can drive high speed ADCs such as the LTC2185. The gain of the ADA4927-1 is set by external feedback resistors next to the input pins. The feedback and input pins of the ADA4927-1 are located very close on the package, allowing for a simple layout and minimizing parasitic capacitance in the feedback network. Therefore, the ADA4927-1 is well suited for driving high performance ADCs from DC to 125 MHz, such as the LTC2185.

Figure 1 shows the schematic of the ADA4927-1 driving the LTC2185. The corresponding layout is shown in Figure 2. The feedback pins of the ADA4927-1 are placed right next to the input pins, which minimizes the parasitic capacitance of the feedback node and improves the phase margin of the amplifier. The layout is also simplified by connecting the feedback resistor directly across the two pins and avoiding additional traces in the feedback path. There is a simple filter between the amplifier and the ADC to reduce the broadband noise of the amplifier and improve the SNR of the system. The filter also attenuates the sampling glitches caused by the ADC before they reach the amplifier. This helps prevent the output network of the ADA4927 from oscillating in response to these glitches. The filter network can be modified for various input bandwidth requirements.

Figure 1. Schematic of the ADA4927-1 driving one channel of the LTC2185.

Figure 2. Layout of the ADA4927-1 driving one channel of the LTC2185.

Figure 3 and Figure 4 show the SNR and SFDR of the LTC2185 and ADA4927-1 combination. At 125 MHz, the SFDR remains above 67 dB, while the SNR is better than 63 dB. The power consumption of this combination is only 250 mW. At a sampling rate of 125 MSPS, the combination provides good performance throughout the second Nyquist frequency region, where the linearity of other amplifiers begins to deteriorate.

Figure 3. SNR of the LTC2185 driven by the ADA4927-1.

Figure 4. SFDR of the LTC2185 driven by the ADA4927-1.

Using the ADA4927-1 to drive the LTC2185 provides excellent linearity while keeping power consumption low. The ADA4927-1 maintains very good linearity at 125 MHz, allowing this ADC amplifier combination to be used in demanding communications and medical applications that require the use of the LTC2185 second Nyquist frequency zone. The ADA4927-1 pinout and filter design greatly simplifies layout while ensuring excellent performance within a low power budget.